529076 Commits

Author SHA1 Message Date
Alexey Bataev
a36a67c79a [SLP]Fix the analysis of the user buildvector nodes for minbitwidth
If the user node is a buildvector/gather node and it has no internal
instructions state, need to check properly for this state and check the
type of the node itself, not its operands.

Fixes #129242
2025-02-28 13:17:14 -08:00
Uday Bondhugula
5faa5f848a
[MLIR][Affine] Fix copy generation for missing memref definition depth check (#129187)
Fixes: https://github.com/llvm/llvm-project/issues/122210
2025-03-01 02:46:08 +05:30
Min Hsu
8c5cd77322 [Exegesis][RISCV] Add missing linked components
LLVMExegesisRISCV should link against MC and TargetParser as well.
2025-02-28 13:04:33 -08:00
Paul Osmialowski
c363975da4
Revert "[libc++][test] extend -linux-gnu XFAIL to cover all of the -linux targets (#129140)" (#129271)
The effect of this commit is too broad and may affect also those
variants of Linux systems on which the affected test cases are known to
pass.

An alternative version of this commit will be prepared afresh.

This reverts commit c93dc581d979eb20ded470d2c16e51b3e775f6e7.
2025-02-28 15:58:37 -05:00
Florian Hahn
275baedfde
[LAA] Consider accessed addrspace when mapping underlying obj to access. (#129087)
In some cases, it is possible for the same underlying object to be
accessed via pointers to different address spaces. This could lead to
pointers from different address spaces ending up in the same dependency
set, which isn't allowed (and triggers an assertion).

Update the mapping from underlying object -> last access to also include
the accessing address space.

Fixes https://github.com/llvm/llvm-project/issues/124759.

PR: https://github.com/llvm/llvm-project/pull/129087
2025-02-28 20:56:12 +00:00
metkarpoonam
23efe734fc
[HLSL] Add "or" intrinsic (#128979)
Include HLSL or_intrinsic, add codegen in CGBuiltin, and the
corresponding tests in or.hlsl. Additionally, incorporate
logical-operator-errors to handle both 'and' and 'or' semantic
diagnostics.
2025-02-28 13:54:13 -07:00
Anatoly Trosinenko
88ae5bd13b
[PAC] Make ValueMapper handle ConstantPtrAuth values (#129088)
Fix assertion failure when building PAuth-hardened code with LTO. W/o assertions we end with invalid codegen.
2025-02-28 12:48:01 -08:00
Florian Hahn
f9b2497055
[VPlan] Use const for VPBasicBlock* in key in VPBB2IRBB (NFC).
This allows queries in places where only a const pointer to VPBasiBlocks
is available.
2025-02-28 20:45:11 +00:00
Louis Dionne
fda7373daf
[libc++] Guard <codecvt> contents on _LIBCPP_HAS_LOCALIZATION (#129112)
The codecvt class is defined in <locale> and the contents of the
<codecvt> header don't work when localization is disabled. Without this
guard, builds with localization disabled that happen to include
<codecvt> could be broken because they would try to include <__locale>,
which ends up trying to include the locale base API and eventually
platform headers like <xlocale.h> that may not exist.
2025-02-28 15:41:44 -05:00
Andrzej Warzyński
4485d91786
[mlir][linalg] Add vectorization to the e2e test for tensor.unpack (#123032)
Following on from #122927 + #123031 that added support for masked
vectorization of `tensor.insert_slice`, this PR extends the e2e test for
`tensor.unpack` to leverage the new functionality.
2025-02-28 20:34:54 +00:00
Alex MacLean
c13be8f0d5
[NVPTX] Add some basic folds for ADDRSPACECAST (#129157) 2025-02-28 12:31:55 -08:00
PiJoules
d9edca4fe0
[CodeGen] Ensure relative vtables use llvm.type.checked.load.relative (#126785)
This intrinsic is used when whole program vtables is used in conjunction
with either CFI or virtual function elimination. The
`llvm.type.checked.load` is unconditionally used, but we need to use the
relative intrinsic for WPD and CFI to work correctly.
2025-02-28 12:26:29 -08:00
Vitaly Buka
b8337bc512
[llvm-size] Add test for invalid conversion spec on error (#128941)
Follow up to #128447.
2025-02-28 11:55:40 -08:00
Vyacheslav Levytskyy
494f67282f
[SPIR-V] Prevent type change of GEP results in type inference (#129250)
The following reproducer demonstrates the issue with invalid definition
of GEP results during type inference

```
define spir_kernel void @foo(i1 %fl, i64 %idx, ptr addrspace(1) %dest, ptr addrspace(3) %src) {
  %p1 = getelementptr inbounds i8, ptr addrspace(1) %dest, i64 %idx
  %res = tail call spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32 2, ptr addrspace(1) %p1, ptr addrspace(3) %src, i64 128, i64 1, target("spirv.Event") zeroinitializer)
  ret void
}

declare dso_local spir_func target("spirv.Event") @_Z22__spirv_GroupAsyncCopyjPU3AS1iPU3AS3Kimm9ocl_event(i32, ptr addrspace(1), ptr addrspace(3), i64, i64, target("spirv.Event"))
```

Here `OpGroupAsyncCopy` expects i32* arguments and type inference fails
to set a correct type of the GEP result `%p1`, because it is an argument
of `OpGroupAsyncCopy`.

This PR fixes the issue by preventing type change of GEP results in type
inference.
2025-02-28 20:55:14 +01:00
Alexey Bataev
e1e20c07e4 [SLP]Fix bitwidth analysis for signed nodes, incoming into UITOFP nodes
If the signed node is the operand of UITOFP, the bitwidth analysis
should consider minimum value between incoming bitwidth and the bitwidth
of the UITOFP node.

Fixes #129244
2025-02-28 11:50:50 -08:00
Andy Kaylor
56cc9299b7
[CIR] Upstream func args alloca handling (#129167)
This change adds support for collecting function arguments and storing
them in alloca memory slots.
2025-02-28 11:43:53 -08:00
David Green
a1fdcfa1ea [AArch64] Protect against scalar types in isNVCastToHalfWidthElements.
Fixes #129227
2025-02-28 19:39:11 +00:00
Alexey Bataev
9869f84f7e [SLP][NFC]Add a test with the incorrect analysis for UITOFP for signed operand 2025-02-28 11:28:38 -08:00
Min-Yih Hsu
c253e5c991
[Exegesis][RISCV] Add initial RVV support (#128767)
This patch adds initial vector extension support to RISC-V's exegesis.
The strategy here is to enumerate all RVV _pseudo_ opcodes as their MC
opcode counterparts are kind of useless under this circumstance. We also
enumerate all possible VTYPE operands in each CodeTemplate
configuration. Various of MachineFunction Passes are used for post
processing the snippets, like inserting VSETVLI instructions.

See https://llvm.org/devmtg/2024-10/slides/techtalk/Hsu-RVV-Exegesis.pdf
for more technical details.
2025-02-28 11:23:16 -08:00
Jerry-Ge
b923f6cf8f
[mlir][tosa] Require PadOp's pad_const to be rank1 (#129156)
Update PadOp's pad_const input to be rank1.

Fix various lit tests for this change including some conv ops

Signed-off-by: Jerry Ge <jerry.ge@arm.com>
Signed-off-by: Tai Ly <tai.ly@arm.com>
Co-authored-by: Tai Ly <tai.ly@arm.com>
2025-02-28 11:21:39 -08:00
vporpo
c7529248cd
[SandboxVec][BottomUpVec] Add -sbvec-stop-bndl flag for debugging (#129132)
This patch adds a helper flag for bisection debugging. This flag
force-stops vectorization after this many bundles have been considered
for vectorization.
Using -sbvec-stop-bndl=0 will not vectorize the code at all.
2025-02-28 11:19:41 -08:00
Marco C.
dd3c4fbec9
[clang-tidy][doc] Contributing.rst update snippet and docs (#129209)
This reflects the add_new_check.py changes: isLanguageVersionSupported
is now overridden by default by the script

The changes were instroduced in
https://github.com/llvm/llvm-project/pull/100129

Thanks
2025-02-28 20:18:13 +01:00
PiJoules
fcc571eeb1
[asan] Define mallopt and mallinfo for Fuchsia asan runtime (#129105) 2025-02-28 11:14:39 -08:00
Hood Chatham
80ea31ccd7
[lld][WebAssembly] Add RUNTIME_PATH support to wasm-ld (#129050)
This finishes adding RPATH support for WebAssembly.

See my previous PR which added RPATH support to yaml2obj and obj2yaml:
https://github.com/llvm/llvm-project/pull/126080
See corresponding update to the WebAssembly/tool-conventions repo on
dynamic linking:
https://github.com/WebAssembly/tool-conventions/pull/246
2025-02-28 11:12:52 -08:00
Craig Topper
9da67e8c92
[RISCV] Remove non-portable vsetvli instructions from llvm-mca test. NFC (#129134)
Not all fractional LMULs are required to be support for all SEWs. This
test previously printed a warning for these cases.
2025-02-28 10:53:05 -08:00
John Harrison
a3ac1f2278
[lldb-dap] Adding server mode support to lldb-dap VSCode extension. (#128957)
This adds support for launching lldb-dap in server mode. The extension
will start lldb-dap in server mode on-demand and retain the server until
the VSCode window is closed (when the extension context is disposed).
While running in server mode, launch performance for binaries is greatly
improved by improving caching between debug sessions.

For example, on my local M1 Max laptop it takes ~5s to attach for the
first attach to an iOS Simulator process and ~0.5s to attach each time
after the first.
2025-02-28 10:49:24 -08:00
Bruno Cardoso Lopes
af2dd15a4b
[MLIR][LLVMIR] Add support for empty global ctor/dtor lists (#128969)
LLVM IR emitted in from C++ may contain `@llvm.global_ctors = appending
global [0 x { i32, ptr, ptr }] zeroinitializer`. Before this PR, if we
try to roundtrip code like this from the importer, we'll end up with
nothing in place.

Note that `llvm::appendToGlobalCtors` ignores empty lists and this PR
uses the same approach as `llvm-as`, which doesn't use the utilities
from `llvm/lib/Transforms/Utils/ModuleUtils.cpp` in order to build this
- it calls into creating a global variable from scratch.
2025-02-28 10:46:17 -08:00
Jerry-Ge
f5749e7893
[mlir][tosa] Remove out_shape from transpose_conv2d (#129133) 2025-02-28 18:38:12 +00:00
Ziqing Luo
7446601c6a
[-Wunsafe-buffer-usage] Fix a potential overflow bug reported by #126334 (#129169)
`MeasureTokenLength` may return an unsigned 0 representing failure in
obtaining length of a token. The analysis now gives up on such cases.
Otherwise, there might be issues caused by unsigned integer "overflow".
2025-02-28 10:33:32 -08:00
Valentyn Yukhymenko
818bca820f
[clang-tidy] [dataflow] Cache reference accessors for bugprone-unchecked-optional-access (#128437)
Fixes https://github.com/llvm/llvm-project/issues/126283

Extending https://github.com/llvm/llvm-project/pull/112605 to cache
const getters which return references.

Fixes false positives from const reference accessors to object
containing optional member
2025-02-28 13:27:20 -05:00
Johannes Doerfert
992b451f08
[Utils][UnifyLoopExits] Avoid costly updates if nothing changed (#129179)
If the ControlFlowHub did not perform any change to the control flow,
there is no need to repair SSA, update the loop structure, and verify a
bunch of things. This is not completely NFC though, repairSSA introduced
PHI nodes with a single entry that are now missing.

My code went from 400+ seconds to 1 second, since no loop required the
exits to be unified, but there were many "complex" loops.
2025-02-28 10:14:31 -08:00
Alex Voicu
926600a805
Revert "[clang][HIP] Make some math not not work with AMDGCN SPIR-V" (#129280)
Reverts llvm/llvm-project#128360 pending resolution of odd test break.
2025-02-28 18:12:39 +00:00
Tai Ly
bdace10538
[mlir][tosa] Rename the result of MATMUL from c to output (#129274)
This renames the output of TOSA MatMul operator from `c` to `output`
to align to TOSA spec

Co-authored-by: TatWai Chong <tatwai.chong@arm.com>
2025-02-28 09:44:05 -08:00
Fangrui Song
7c26356703
[llvm-objdump] Rework .gnu.version_d dumping
and fix crash when vd_aux is invalid (#86611).

vd_version, vd_flags, vd_ndx, and vd_cnt in Elf{32,64}_Verdef are
16-bit. Change VerDef to use uint16_t instead.

vda_name specifies a NUL-terminated string. Update getVersionDefinitions
to remove some `.c_str()`.

Pull Request: https://github.com/llvm/llvm-project/pull/128434
2025-02-28 09:38:48 -08:00
Craig Topper
1b25c0c4da
[RISCV] Improve assembler error message for Zcmp stack adjustment. (#129180)
Instead of referring the user to the spec, print the expected range.
2025-02-28 09:05:40 -08:00
Florian Hahn
c0bf4b2c57
[VPlan] Remove unneeded VPValue::getLiveInIRValue() const (NFC).
The accessor is not needed/used.
2025-02-28 17:01:19 +00:00
Alex Voicu
029becebfd
[clang][HIP] Make some math not not work with AMDGCN SPIR-V (#128360)
Do not hardcode `address_space(5)` (`private`) in the ROCDL interface,
as that breaks SPIRV generation (the latter uses 0). Add test. In the
long run we should stop using ROCDL inline.
2025-02-28 16:55:36 +00:00
Tristan Ross
9b6d0d7660
[libc] Add UEFI headers (#127126)
Originated from #120687

This PR simply adds the necessary headers for UEFI which defines all the
necessary types. This PR unlocks the ability to work on other PR's for
UEFI support.
2025-02-28 11:43:33 -05:00
Michael Flanders
43eb18e51f
[analyzer] Do list initialization for CXXNewExpr with initializer list arg (#127702)
Fixes #116444.

Closed #127700 because I accidentally updated it in github UI.

### Current vs expected behavior

Previously, the result of a `CXXNewExpr` was not always list initialized
when using an initializer list.

In this example:
```
struct S { int x; };
void F() {
  S *s = new S{1};
  delete s;
}
```
there would be a binding of `s` to `compoundVal{1}`, but this isn't used
during later field binding lookup. After this PR, there is instead a
binding of `s->x` to `1`. This is the cause of #116444 since the field
binding lookup returns undefined in some cases currently.

### Changes

This PR swaps around the handling of typed value regions (seems to be
the usual region type when doing non-CXX-new-expr list initialization)
and symbolic regions (the result of the CXX new expr), so that symbolic
regions also get list initialized. In the below snippet, it swaps the
order of the two conditionals.

8529bd7b96/clang/lib/StaticAnalyzer/Core/RegionStore.cpp (L2426-L2448)

### Followup work

This PR only makes CSA do list init for `CXXNewExpr`s. After this, I
would like to make some changes to `RegionStoreMananger::bind` in how it
handles list initialization generally.

I've added some straightforward test cases here for the `new` expr with
a list initializer. I started adding some more before realizing that the
current general (not just `new` expr) list initialization could be
changed to handle more cases like list initialization of unions and
arrays (like https://github.com/llvm/llvm-project/issues/54910). Lmk if
it is preferred to then leave these test cases out for now.
2025-02-28 17:42:26 +01:00
LLVM GN Syncbot
3f63e1c834 [gn build] Port 7e33bebe7c8c 2025-02-28 16:12:33 +00:00
ShatianWang
7e33bebe7c
[BOLT] Report flow conservation scores (#127954)
Add two additional profile quality stats for CG (call graph) and CFG
(control flow graph) flow conservations besides the CFG discontinuity
stats introduced in #109683. The two new stats quantify how different
"in-flow" is from "out-flow" in the following cases where they should be
equal. The smaller the reported stats, the better the flow conservations
are.

CG flow conservation: for each function that is not a program entry, the
number of times the function is called according to CG ("in-flow")
should be equal to the number of times the transition from an entry
basic block of the function to another basic block within the function
is recorded ("out-flow").

CFG flow conservation: for each basic block that is not a function entry
or exit, the number of times the transition into this basic block from
another basic block within the function is recorded ("in-flow") should
be equal to the number of times the transition from this basic block to
another basic block within the function is recorded ("out-flow").

Use `-v=1` for more detailed bucketed stats, and use `-v=2` to dump
functions / basic blocks with bad flow conservations.
2025-02-28 11:06:52 -05:00
Kazu Hirata
b2525dc663
[MCA] Avoid repeated hash lookups (NFC) (#129192) 2025-02-28 08:04:26 -08:00
Kazu Hirata
9af10e3d9d
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#129191) 2025-02-28 08:04:09 -08:00
Philip Reames
248be98418 Reapply "[RISCV][TTI] Add shuffle costing for masked slide lowering (#128537)"
With a fix for fully undef masks.  These can't reach the lowering code, but
can reach the costing code via e.g. SLP.

This change adds the TTI costing corresponding to the recently added
isMaskedSlidePair lowering for vector shuffles. However, since the
existing costing code hadn't covered either slideup, slidedown, or the
(now removed) isElementRotate, the impact is larger in scope than just
that new lowering.

---------

Co-authored-by: Alexey Bataev <a.bataev@gmx.com>
Co-authored-by: Luke Lau <luke_lau@icloud.com>
2025-02-28 08:02:27 -08:00
David Spickett
09c64e56d4
[lldb] Restore register state if PrepareTrivialCall fails (#129038)
Fixes #124269

PrepareTrivalCall always had the possibility of failing, but given that
it only wrote to general purpose registers, if it did, you had bigger
problems.

When it failed, we did not mark the thread plan valid and when it was
torn down we didn't try to restore the register state. This meant that
if you tried to continue, the program was unlikely to work.

When I added AArch64 GCS support, I needed to handle the situation where
the GCS pointer points to unmapped memory and we fail to write the extra
entry we need. So I added code to restore the gcspr_el0 register
specifically if this happened, and ordered the operations so that we
tried this first.

In this change I've made the teardown of an invalid thread plan restore
the register state if one was saved. It may be there isn't one if
ConstructorSetup fails, but this is ok because that function does not
modify anything.

Now that we're doing that, I don't need the GCS specific code anymore,
and all thread plans are protected from this in the rare event something
does fail.

Testing is done by the existing GCS test case that points the gcspr into
unmapped memory which causes PrepareTrivialCall to fail. I tried adding
a simulated test using a mock gdb server. This was not possible because
they all use DynamicLoaderStatic which disables all JIT features.
2025-02-28 15:58:29 +00:00
Nico Weber
2639dea7d8 [gn build] Port 15c49b9db3f6 2025-02-28 10:30:43 -05:00
RolandF77
a73e591f33
[PowerPC] custom lower v1024i1 load/store (#126969)
Support moving PPC dense math register values to and from storage with
LLVM IR load/store.
2025-02-28 10:25:07 -05:00
Virginia Cangelosi
4a477eeefa
Fix fp8-init-list.c test failure (#129259)
Fix error in fp8-init-list.c introduced by PR #126726
2025-02-28 15:17:33 +00:00
Jim Lin
94f6b6d538
[SelectionDAG][RISCV] Promote VECREDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM} (#128800)
This patch also adds the tests for VP_REDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM}, which have been supported for a while.
2025-02-28 23:13:30 +08:00
Eisuke Kawashima
24abf2c728
[lldb] fix(lldb/**.py): fix invalid escape sequences (#94034)
Co-authored-by: Eisuke Kawashima <e-kwsm@users.noreply.github.com>
2025-02-28 14:59:35 +00:00