465 Commits

Author SHA1 Message Date
Nathan Sidwell
31626dadce
[llvm][NFC] Refactor AutoUpgrader arm/aarch64 (#74145)
Break out and refactor AArch64 & ARM intrinsic updating.  There's a fair amount of comonality, but let's avoid continually checking the same prefixes.
2024-01-05 13:50:44 -05:00
Kazu Hirata
395f9ce30e Use StringRef::{starts,ends}_with (NFC)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.
2023-12-16 10:14:44 -08:00
Jessica Del
32f9983c06
[AMDGPU] - Add address space for strided buffers (#74471)
This is an experimental address space for strided buffers. These buffers
can have structs as elements and
a stride > 1.
These pointers allow the indexed access in units of stride, i.e., they
point at `buffer[index * stride]`.
Thus, we can use the `idxen` modifier for buffer loads.

We assign address space 9 to 192-bit buffer pointers which contain a
128-bit descriptor, a 32-bit offset and a 32-bit index. Essentially,
they are fat buffer pointers with an additional 32-bit index.
2023-12-15 15:49:25 +01:00
Kazu Hirata
586ecdf205
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.
2023-12-11 21:01:36 -08:00
Nikita Popov
a87738f86b [AutoUpgrade] Don't try to upgrade struct return of non-intrinsic
This code should only be run for intrinsics known to LLVM (otherwise
it will crash), not for everything that starts with "llvm.".
2023-12-08 17:18:20 +01:00
Nikita Popov
e309667769 [AutoUpgrade] Simplify vclz upgrade (NFC)
We can use Intrinsic::getDeclaration() here, we just have to pass
the correct arguments. This function accepts only the mangled types,
not all argument types.
2023-12-04 16:30:00 +01:00
Nathan Sidwell
d04a4a06ab
[llvm] Adjust Autoupdater's llvm prefix detection (#74142)
Use consume_front to swallow the 'llvm.' prefix, and 'empty' to check
there's at least one character left.
2023-12-02 11:57:41 -05:00
Nathan Sidwell
91b2559a6a
[nvptx] Fix autoupdater's intrinsic matcher (#73330)
Fix nvptx autoupdater's intrinsic matcher's typo'd names that used `_` (underbar), rather than '.' (dot), as a separator.
2023-12-01 14:52:38 -05:00
Nathan Sidwell
adc6b43ee1
[llvm][NFC] Autoupdater AMD intrinsic detection (#73331)
Check atomic prefix before looking for atomic instructions
2023-12-01 14:50:39 -05:00
Nathan Sidwell
770dc47659
[llvm][NFC] Refactor autoupdater's 'c' intrinsics (#73333)
With these three intrinsics it's probable faster to check the number of
arguments first and then check the names. We can also handle ctlz and
cttz in the same block.
2023-11-30 13:29:03 +09:00
Nathan Sidwell
fcf5ac84a6
[llvm][NFC] Autoupdater x86 intrinsic selection (#73046)
Sort  x86 intrinsics and use prefix checking.
2023-11-25 08:02:39 -05:00
Nathan Sidwell
d34ac0ee72
[llvm][NFC] Autoupdater x86 detection (#72808)
Sort x86 intrinsics for better readability and use common prefixes to reduce number of comparisons.
2023-11-21 12:52:12 -05:00
Simon Pilgrim
939fd6c37c [AutoUpgrade] Use StringRef::starts_with/ends_with instead of startswith/endswith. NFC.
startswith/endswith wrap starts_with/ends_with and will eventually go away (to more closely match string_view)
2023-11-06 13:27:36 +00:00
Harald van Dijk
a21abc782a
[X86] Align i128 to 16 bytes in x86 datalayouts
This is an attempt at rebooting https://reviews.llvm.org/D28990

I've included AutoUpgrade changes to modify the data layout to satisfy the compatible layout check. But this does mean alloca, loads, stores, etc in old IR will automatically get this new alignment.

This should fix PR46320.

Reviewed By: echristo, rnk, tmgross

Differential Revision: https://reviews.llvm.org/D86310
2023-10-11 10:23:38 +01:00
Youngsuk Kim
e5026f0179 [llvm] Remove uses of Type::getPointerTo() (NFC)
Partial progress towards removing in-tree uses of `getPointerTo()`,
by employing the following options:

* Drop the call entirely if the sole purpose of it is to support a no-op
  bitcast (remove the no-op bitcast as well).

* Replace with `PointerType::get()`/`PointerType::getUnqual()`

This is a NFC cleanup effort.

Reviewed By: barannikov88

Differential Revision: https://reviews.llvm.org/D155232
2023-09-22 19:44:38 -04:00
Anton Korobeynikov
51d5d7bbae
Extend retcon.once coroutines lowering to optionally produce a normal result (#66333)
One of the main user of these kind of coroutines is swift. There yield-once (`retcon.once`) coroutines are used to temporary "expose" pointers to internal fields of various objects creating borrow scopes.

However, in some cases it might be useful also to allow these coroutines to produce a normal result, but there is no convenient way to represent this (as compared to switched-resume kind of coroutines where C++ `co_return`
is transformed to a member / callback call on promise object).

The extension is simple: we allow continuation function to have a non-void result and accept optional extra arguments via a special `llvm.coro.end.result` intrinsic that would essentially forward them as normal results.
2023-09-15 09:54:38 -07:00
Matt Arsenault
edecb60481 Reapply "AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp"
This reverts commit d9333e360a7c52587ab6e4328e7493b357fb2cf3.
2023-09-13 08:38:48 +03:00
Nathan Sidwell
b045c36ab9 [llvm][NFC]Refactor AutoUpgrader case 'n'.
The NVPTX intrinsics are under 'n'. Use the consume_front API, so fix
that. Refactor the helper function to group matchers on the first
component and check that first. Do similarly with the final set of
intrinsics, which have a lot of commonality in the matching.  Finally
reorder the argument/return type checking wrt name checking -- the
former is going to be cheaper, so do that first before checking the
name.#

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D158445
2023-08-22 16:32:53 -04:00
Nathan Sidwell
a695be7c28 [llvm][NFC] Refactor AutoUpgrade case 'w'
Check for 'wasm.' prefix before proceeding, and a bit of common handling
for some of the intrinsics therein.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D158370
2023-08-20 19:15:04 -04:00
Nathan Sidwell
326280d965 [llvm][NFC] Refactor AutoUpgrade dbg case
Consume the dbg. prefix before looking further. Also merge the matched
path.

Differential Revision: https://reviews.llvm.org/D158341

Reviewed By: nikic
2023-08-20 12:09:46 -04:00
Nathan Sidwell
d6a1388d6f [llvm][NFC] Refactor AutoUpdater case 'e'
It is more efficient to gate on the prefix before checking for the
individual cases. Also, the regexps weren't consistent about escaping '.'.

Differential Revision: https://reviews.llvm.org/D157923

Reviewed By: arsenm
2023-08-20 11:27:29 -04:00
Nathan Sidwell
e40c48dff9 [llvm][NFC] AutoUpgrade l case
Drop unneeded 'case'. Clean up bracing & whitespace.

Approved By: nikic

Differential Revision: https://reviews.llvm.org/D158126
2023-08-17 19:57:22 -04:00
Nathan Sidwell
867724142a [llvm][NFC] Refactor AutoUpdater riscv cases
There's a large amount of commonality in the riscv upgrader, make that
clearer.  And check for a riscv prefix before diving in.

Reviewed  By: nikic

Differential Revision: https://reviews.llvm.org/D157924
2023-08-16 16:43:44 -04:00
Nikita Popov
caeb636e8b [AutoUpgrade] Remove redundant remangling code (NFCI)
If the only purpose of the upgrade is a mangling change, this is
handled generically by intrinsic remangling, and does not require
any hand-written code.
2023-08-14 15:14:40 +02:00
Nathan Sidwell
037f203601 [llvm][NFC] Adjust address-space access auto upgrade detection
The address-space intrinsics need detecting, and all have very similar
processing.  Refactor to do just that.

Differential Revision: https://reviews.llvm.org/D157763

Reviewed By: jroelofs
2023-08-12 17:26:53 -04:00
Matt Arsenault
204a417d51 AutoUpgrade: Use syncscope("agent") atomic.inc/dec intrinsic upgrade
The old syncscope parameter never really worked correctly, but
effectively gave "workgroup" scope. Use something faster than system
but more correct than before.

https://reviews.llvm.org/D157389
2023-08-10 17:38:25 -04:00
Bjorn Pettersson
e53b28c833 [llvm] Drop some bitcasts and references related to typed pointers
Differential Revision: https://reviews.llvm.org/D157551
2023-08-10 15:07:07 +02:00
Nathan Sidwell
b6c220da02 [llvm][NFC] Adjust mem fn auto upgrade detection
AutoUpgrade detection of memcpy and memmove is almost
identical. Commonize the code path.

Reviewed By: jroelofs
2023-08-05 17:29:04 -04:00
Matt Arsenault
d4a6b05681 AutoUpgrade: Use consume_front 2023-07-26 17:29:19 -04:00
Craig Topper
a64b3e92c7 [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.
Previously we returned i32 on RV32 and i64 on RV64. The instructions
only consume 32 bits and only produce 32 bits. For RV64, the result
is sign extended to 64 bits like *W instructions.

This patch removes this detail from the interface to improve
portability and consistency. This matches the proposal for scalar
intrinsics here https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44

I've included IR autoupgrade support as well.

I'll be doing this for other builtins/intrinsics that currently use
'long' in other patches.

Reviewed By: VincentWu

Differential Revision: https://reviews.llvm.org/D154647
2023-07-17 08:58:29 -07:00
root
250f2bb2c6 adding bf16 support to NVPTX
Currently, bf16 has been scatteredly added to the PTX codegen. This patch aims to complete the set of instructions and code path required to support bf16 data type.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D144911

Co-authored-by: Artem Belevich <tra@google.com>
2023-06-28 11:57:13 -07:00
Elliot Goodrich
f0fa2d7c29 [llvm] Move AttributeMask to a separate header
Move `AttributeMask` out of `llvm/IR/Attributes.h` to a new file
`llvm/IR/AttributeMask.h`.  After doing this we can remove the
`#include <bitset>` and `#include <set>` directives from `Attributes.h`.
Since there are many headers including `Attributes.h`, but not needing
the definition of `AttributeMask`, this causes unnecessary bloating of
the translation units and slows down compilation.

This commit adds in the include directive for `llvm/IR/AttributeMask.h`
to the handful of source files that need to see the definition.

This reduces the total number of preprocessing tokens across the LLVM
source files in lib from (roughly) 1,917,509,187 to 1,902,982,273 - a
reduction of ~0.76%. This should result in a small improvement in
compilation time.

Differential Revision: https://reviews.llvm.org/D153728
2023-06-27 15:26:17 +01:00
Matt Arsenault
92ee60b66f AMDGPU: Drop and upgrade llvm.amdgcn.atomic.inc/dec to atomicrmw 2023-06-21 21:20:26 -04:00
Matt Arsenault
d9333e360a Revert "AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp"
This reverts commit 1159c670d40e3ef302264c681fe7e0268a550874.

Accidentally pushed wrong patch
2023-06-16 18:13:07 -04:00
Matt Arsenault
1159c670d4 AMDGPU: Drop and auto-upgrade llvm.amdgcn.ldexp to llvm.ldexp 2023-06-16 18:06:27 -04:00
Craig Topper
2f2af2d017 [RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.
This matches gcc. It also lets us fix a bug that the byteselect
predicate was not being evaluated in tablegen. We can't have i8
TImmLeaf in tablegen because i8 isn't a type for any register class.

I've added AutoUpgrade support for the IR intrinsics.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D152627
2023-06-13 10:39:43 -07:00
Matt Arsenault
d065b1d65b AutoUpgrade: Fix crash when tbaa has an empty argument
Produce a verifier error instead.
2023-06-05 20:44:58 -04:00
Kazu Hirata
cf1ef41610 [IR] Use LLVMContext::MD_nontemporal (NFC) 2023-05-23 23:37:38 -07:00
Krzysztof Drewniak
f0415f2a45 Re-land "[AMDGPU] Define data layout entries for buffers""
Re-land D145441 with data layout upgrade code fixed to not break OpenMP.

This reverts commit 3f2fbe92d0f40bcb46db7636db9ec3f7e7899b27.

Differential Revision: https://reviews.llvm.org/D149776
2023-05-03 19:43:56 +00:00
Krzysztof Drewniak
3f2fbe92d0 Revert "[AMDGPU] Define data layout entries for buffers"
This reverts commit f9c1ede2543b37fabe9f2d8f8fed5073c475d850.

Differential Revision: https://reviews.llvm.org/D149758
2023-05-03 16:11:00 +00:00
Krzysztof Drewniak
f9c1ede254 [AMDGPU] Define data layout entries for buffers
Per discussion at
https://discourse.llvm.org/t/representing-buffer-descriptors-in-the-amdgpu-target-call-for-suggestions/68798,
we define two new address spaces for AMDGCN targets.

The first is address space 7, a non-integral address space (which was
already in the data layout) that has 160-bit pointers (which are
256-bit aligned) and uses a 32-bit offset. These pointers combine a
128-bit buffer descriptor and a 32-bit offset, and will be usable with
normal LLVM operations (load, store, GEP). However, they will be
rewritten out of existence before code generation.

The second of these is address space 8, the address space for "buffer
resources". These will be used to represent the resource arguments to
buffer instructions, and new buffer intrinsics will be defined that
take them instead of <4 x i32> as resource arguments. ptr
addrspace(8). These pointers are 128-bits long (with the same
alignment). They must not be used as the arguments to getelementptr or
otherwise used in address computations, since they can have
arbitrarily complex inherent addressing semantics that can't be
represented in LLVM. Even though, like their address space 7 cousins,
these pointers have deterministic ptrtoint/inttoptr semantics, they
are defined to be non-integral in order to prevent optimizations that
rely on pointers being a [0, [addr_max]] value from applying to them.

Future work includes:
- Defining new buffer intrinsics that take ptr addrspace(8) resources.
- A late rewrite to turn address space 7 operations into buffer
intrinsics and offset computations.

This commit also updates the "fallback address space" for buffer
intrinsics to the buffer resource, and updates the alias analysis
table.

Depends on D143437

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D145441
2023-05-03 15:25:58 +00:00
Nikita Popov
6fc670e5e3 [WebAssembly] Add auto-upgrade for renamed intrinsics
D138249 renamed a number of wasm intrinsics without implementing
auto-upgrade support.

Differential Revision: https://reviews.llvm.org/D146424
2023-03-21 09:22:15 +01:00
Arthur Eubanks
a4d3bc6814 [AutoUpgrade] Add flag to disable autoupgrading debug info
Auto-upgrade can be expensive, especially UpgradeDebugInfo() since it runs the verifier.

With this patch, we can specify that the imported bitcode is built with the same revision of LLVM, meaning there's no need to run any auto-upgrading. For now, limit this to just debug info since projects like Rust want to support multiple versions of LLVM at the same time (at compiler build time, not at Rust source code build time) and run a subset of the autoupgrade functionality for simplicity.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D143229
2023-03-14 12:41:46 -07:00
J. Ryan Stinnett
c0527fff03 [DebugInfo] Upgrade dbg.addr to dbg.value
As part of removing `dbg.addr`, this upgrades any calls to `dbg.value` with
`DW_OP_deref` prepended onto the value expression.

Part of `dbg.addr` removal
Discussed in https://discourse.llvm.org/t/what-is-the-status-of-dbg-addr/62898

Differential Revision: https://reviews.llvm.org/D144793
2023-03-02 09:29:42 +00:00
Archibald Elliott
62c7f035b4 [NFC][TargetParser] Remove llvm/ADT/Triple.h
I also ran `git clang-format` to get the headers in the right order for
the new location, which has changed the order of other headers in two
files.
2023-02-07 12:39:46 +00:00
Sergei Barannikov
41e4883821 [Thumb2] Upgrade intrinsic upgrading code
Enabling opaque pointers has changed the mangled names of these two ARM
intrinsics:

`arm.mve.vldr.gather.offset.predicated.v2i64.p0i64.v2i64.v4i1`
`arm.mve.vstr.scatter.offset.predicated.p0i64.v2i64.v2i64.v4i1`

They are now spelled as:

`arm.mve.vldr.gather.offset.predicated.v2i64.p0.v2i64.v4i1`
`arm.mve.vstr.scatter.offset.predicated.p0.v2i64.v2i64.v4i1`

Upgrade intrinsic upgrading code to account for the change in names.

Differential Revision: https://reviews.llvm.org/D142900
2023-01-31 13:11:08 +03:00
Guillaume Chatelet
8fd5558b29 [NFC] Use TypeSize::geFixedValue() instead of TypeSize::getFixedSize()
This change is one of a series to implement the discussion from
https://reviews.llvm.org/D141134.
2023-01-11 16:49:38 +00:00
serge-sans-paille
38818b60c5
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
Use deduction guides instead of helper functions.

The only non-automatic changes have been:

1. ArrayRef(some_uint8_pointer, 0) needs to be changed into ArrayRef(some_uint8_pointer, (size_t)0) to avoid an ambiguous call with ArrayRef((uint8_t*), (uint8_t*))
2. CVSymbol sym(makeArrayRef(symStorage)); needed to be rewritten as CVSymbol sym{ArrayRef(symStorage)}; otherwise the compiler is confused and thinks we have a (bad) function prototype. There was a few similar situation across the codebase.
3. ADL doesn't seem to work the same for deduction-guides and functions, so at some point the llvm namespace must be explicitly stated.
4. The "reference mode" of makeArrayRef(ArrayRef<T> &) that acts as no-op is not supported (a constructor cannot achieve that).

Per reviewers' comment, some useless makeArrayRef have been removed in the process.

This is a follow-up to https://reviews.llvm.org/D140896 that introduced
the deduction guides.

Differential Revision: https://reviews.llvm.org/D140955
2023-01-05 14:11:08 +01:00
Qiu Chaofan
a40ef656d8 [Intrinsic] Rename flt.rounds intrinsic to get.rounding
Address the inconsistency between FLT_ROUNDS_ and SET_ROUNDING SDAG
node. Rename FLT_ROUNDS_ to GET_ROUNDING and add llvm.get.rounding
intrinsic to replace flt.rounds.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D139507
2022-12-19 15:22:39 +08:00
Alex Richardson
9114ac67a9 Overload all llvm.annotation intrinsics for globals argument
The global constant arguments could be in a different address space
than the first argument, so we have to add another overloaded argument.
This patch was originally made for CHERI LLVM (where globals can be in
address space 200), but it also appears to be useful for in-tree targets
as can be seen from the test diffs.

Differential Revision: https://reviews.llvm.org/D138722
2022-12-07 18:29:18 +00:00