Matt Arsenault 7425af4b7a

AMDGPU: Add pseudoinstruction for agpr or vgpr constants (#130042)

2025-03-07 09:18:22 +07:00

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AMDGPU

AMDGPU: Add pseudoinstruction for agpr or vgpr constants (#130042)

2025-03-07 09:18:22 +07:00

convergencectrl/AMDGPU

[AMDGPU,test] Change llc -march= to -mtriple=

2024-03-07 19:09:18 -08:00

RISCV

[RISCV] Mark vmvNr.v as implicitly using vtype (#118414)

2024-12-04 15:10:57 +08:00

copy-scalable.mir

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generic-vreg-undef-use.mir

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live-ins-01.mir

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live-ins-02.mir

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live-ins-03.mir

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stack-protector-offset.mir

MachineVerifier: Check stack protector is top-most in frame (#122635)

2025-01-14 16:24:09 +02:00

test_abd_su.mir

[GISel] Remove unnecessary MachineVerifier checks for G_ABDS/G_ABDU. (#120014)

2024-12-15 17:30:32 -08:00

test_adjustsstack.mir

Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"

2024-03-21 20:24:57 -04:00

test_copy_mismatch_types.mir

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test_copy_physregs_x86.mir

[test] Change llc -march= to -mtriple=

2024-12-15 13:08:02 -08:00

test_copy.mir

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test_g_add.mir

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test_g_addrspacecast.mir

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test_g_assert_align.mir

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test_g_assert_sext_register_bank_class.mir

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test_g_assert_sext.mir

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test_g_assert_zext_register_bank_class.mir

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test_g_assert_zext.mir

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test_g_brindirect_is_indirect_branch.mir

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test_g_brjt_is_indirect_branch.mir

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test_g_brjt.mir

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test_g_bswap.mir

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test_g_build_vector_trunc.mir

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test_g_build_vector.mir

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test_g_bzero.mir

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test_g_concat_vectors.mir

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test_g_constant_pool.mir

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test_g_constant.mir

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test_g_dyn_stackalloc.mir

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test_g_extract_subvector.mir

[MachineVerifier] Improve G_EXTRACT_SUBVECTOR checking (#109202)

2024-09-18 18:29:32 -07:00

test_g_extract.mir

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test_g_fcmp.mir

[RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_ICMP for scalable vector types

2024-04-03 15:27:15 -07:00

test_g_fconstant.mir

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test_g_icmp.mir

[RISCV][GISEL] Legalize G_ZEXT, G_SEXT, and G_ANYEXT, G_SPLAT_VECTOR, and G_ICMP for scalable vector types

2024-04-03 15:27:15 -07:00

test_g_insert_subvector.mir

[MachineVerifier] Improve checks for G_INSERT_SUBVECTOR. (#109209)

2024-09-18 18:31:16 -07:00

test_g_insert.mir

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test_g_inttoptr.mir

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test_g_invoke_region_start.mir

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test_g_is_fpclass.mir

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test_g_jump_table.mir

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test_g_llround.mir

llvm.lround: Update verifier to validate support of vector types. (#98950)

2024-08-20 13:24:15 -05:00

test_g_load.mir

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test_g_lround.mir

llvm.lround: Update verifier to validate support of vector types. (#98950)

2024-08-20 13:24:15 -05:00

test_g_memcpy_inline.mir

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test_g_memcpy.mir

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test_g_memmove.mir

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test_g_memset.mir

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test_g_merge_values.mir

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test_g_phi.mir

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test_g_prefetch.mir

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test_g_ptr_add.mir

[GISel] Enforce G_PTR_ADD RHS type matching index size for addr space (#84352)

2024-03-09 09:07:22 +00:00

test_g_ptrmask.mir

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test_g_ptrtoint.mir

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test_g_rotr_rotl.mir

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test_g_select.mir

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test_g_sext_inreg.mir

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test_g_sextload.mir

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test_g_shift.mir

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test_g_shuffle_vector.mir

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test_g_splat_vector.mir

[GISel][RISCV] Correctly handle scalable vector shuffles of pointer vectors in IRTranslator. (#106580)

2024-08-29 12:35:50 -07:00

test_g_store.mir

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test_g_trunc.mir

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test_g_ubfx_sbfx.mir

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test_g_ubsantrap.mir

[GlobalISel] Introduce G_TRAP, G_DEBUGTRAP, G_UBSANTRAP (#84941)

2024-03-23 13:12:44 +01:00

test_g_unmerge_values.mir

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test_g_vscale.mir

[GlobalIsel] Fix Machine Verifier errors (#99018)

2024-07-17 06:04:46 +02:00

test_g_zextload.mir

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test_insert_subreg.mir

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test_multiple_errors.mir

[MachineVerifier] Report errors from one thread at a time (#111605)

2024-10-11 11:53:44 -07:00

test_phis_precede_nonphis.mir

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test_step-vector.mir

[GlobalISel] Add G_STEP_VECTOR instruction (#115598)

2024-11-11 10:45:02 +01:00

test_uscmp.mir

[GISel] Improve MachineVerifier for G_SCMP/UCMP. (#120017)

2024-12-15 22:08:43 -08:00

test_vector_reductions.mir

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verifier-generic-extend-truncate.mir

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verifier-generic-types-1.mir

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verifier-generic-types-2.mir

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verifier-phi-fail0.mir

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verifier-phi.mir

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verifier-statepoint.mir

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verify-inlineasmbr.mir

[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)

2025-03-06 09:28:44 -08:00

verify-regbankselected-dbg-undef-use.mir

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verify-regbankselected.mir

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verify-regops.mir

[test] Change llc -march= to -mtriple=

2024-12-15 13:08:02 -08:00

verify-selected-dbg-undef-use.mir

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verify-selected.mir

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