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315 lines
12 KiB
C++
315 lines
12 KiB
C++
//===- llvm/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp -------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/DbgEntityHistoryCalculator.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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#include <map>
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#include <utility>
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using namespace llvm;
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#define DEBUG_TYPE "dwarfdebug"
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// If @MI is a DBG_VALUE with debug value described by a
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// defined register, returns the number of this register.
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// In the other case, returns 0.
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static unsigned isDescribedByReg(const MachineInstr &MI) {
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assert(MI.isDebugValue());
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assert(MI.getNumOperands() == 4);
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// If location of variable is described using a register (directly or
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// indirectly), this register is always a first operand.
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return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
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}
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void DbgValueHistoryMap::startInstrRange(InlinedEntity Var,
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const MachineInstr &MI) {
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// Instruction range should start with a DBG_VALUE instruction for the
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// variable.
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assert(MI.isDebugValue() && "not a DBG_VALUE");
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auto &Ranges = VarInstrRanges[Var];
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if (!Ranges.empty() && Ranges.back().second == nullptr &&
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Ranges.back().first->isIdenticalTo(MI)) {
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LLVM_DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
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<< "\t" << Ranges.back().first << "\t" << MI << "\n");
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return;
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}
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Ranges.push_back(std::make_pair(&MI, nullptr));
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}
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void DbgValueHistoryMap::endInstrRange(InlinedEntity Var,
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const MachineInstr &MI) {
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auto &Ranges = VarInstrRanges[Var];
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// Verify that the current instruction range is not yet closed.
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assert(!Ranges.empty() && Ranges.back().second == nullptr);
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// For now, instruction ranges are not allowed to cross basic block
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// boundaries.
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assert(Ranges.back().first->getParent() == MI.getParent());
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Ranges.back().second = &MI;
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}
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unsigned DbgValueHistoryMap::getRegisterForVar(InlinedEntity Var) const {
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const auto &I = VarInstrRanges.find(Var);
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if (I == VarInstrRanges.end())
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return 0;
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const auto &Ranges = I->second;
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if (Ranges.empty() || Ranges.back().second != nullptr)
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return 0;
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return isDescribedByReg(*Ranges.back().first);
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}
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void DbgLabelInstrMap::addInstr(InlinedEntity Label, const MachineInstr &MI) {
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assert(MI.isDebugLabel() && "not a DBG_LABEL");
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LabelInstr[Label] = &MI;
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}
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namespace {
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// Maps physreg numbers to the variables they describe.
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using InlinedEntity = DbgValueHistoryMap::InlinedEntity;
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using RegDescribedVarsMap = std::map<unsigned, SmallVector<InlinedEntity, 1>>;
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} // end anonymous namespace
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// Claim that @Var is not described by @RegNo anymore.
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static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
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InlinedEntity Var) {
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const auto &I = RegVars.find(RegNo);
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assert(RegNo != 0U && I != RegVars.end());
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auto &VarSet = I->second;
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const auto &VarPos = llvm::find(VarSet, Var);
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assert(VarPos != VarSet.end());
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VarSet.erase(VarPos);
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// Don't keep empty sets in a map to keep it as small as possible.
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if (VarSet.empty())
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RegVars.erase(I);
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}
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// Claim that @Var is now described by @RegNo.
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static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
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InlinedEntity Var) {
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assert(RegNo != 0U);
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auto &VarSet = RegVars[RegNo];
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assert(!is_contained(VarSet, Var));
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VarSet.push_back(Var);
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}
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// Terminate the location range for variables described by register at
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// @I by inserting @ClobberingInstr to their history.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
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RegDescribedVarsMap::iterator I,
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DbgValueHistoryMap &HistMap,
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const MachineInstr &ClobberingInstr) {
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// Iterate over all variables described by this register and add this
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// instruction to their history, clobbering it.
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for (const auto &Var : I->second)
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HistMap.endInstrRange(Var, ClobberingInstr);
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RegVars.erase(I);
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}
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// Terminate the location range for variables described by register
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// @RegNo by inserting @ClobberingInstr to their history.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
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DbgValueHistoryMap &HistMap,
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const MachineInstr &ClobberingInstr) {
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const auto &I = RegVars.find(RegNo);
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if (I == RegVars.end())
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return;
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clobberRegisterUses(RegVars, I, HistMap, ClobberingInstr);
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}
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// Returns the first instruction in @MBB which corresponds to
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// the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
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static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
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auto LastMI = MBB.getLastNonDebugInstr();
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if (LastMI == MBB.end() || !LastMI->isReturn())
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return nullptr;
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// Assume that epilogue starts with instruction having the same debug location
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// as the return instruction.
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DebugLoc LastLoc = LastMI->getDebugLoc();
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auto Res = LastMI;
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for (MachineBasicBlock::const_reverse_iterator I = LastMI.getReverse(),
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E = MBB.rend();
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I != E; ++I) {
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if (I->getDebugLoc() != LastLoc)
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return &*Res;
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Res = &*I;
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}
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// If all instructions have the same debug location, assume whole MBB is
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// an epilogue.
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return &*MBB.begin();
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}
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// Collect registers that are modified in the function body (their
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// contents is changed outside of the prologue and epilogue).
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static void collectChangingRegs(const MachineFunction *MF,
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const TargetRegisterInfo *TRI,
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BitVector &Regs) {
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for (const auto &MBB : *MF) {
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auto FirstEpilogueInst = getFirstEpilogueInst(MBB);
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for (const auto &MI : MBB) {
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// Avoid looking at prologue or epilogue instructions.
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if (&MI == FirstEpilogueInst)
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break;
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if (MI.getFlag(MachineInstr::FrameSetup))
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continue;
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// Look for register defs and register masks. Register masks are
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// typically on calls and they clobber everything not in the mask.
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for (const MachineOperand &MO : MI.operands()) {
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// Skip virtual registers since they are handled by the parent.
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if (MO.isReg() && MO.isDef() && MO.getReg() &&
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!TRI->isVirtualRegister(MO.getReg())) {
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for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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++AI)
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Regs.set(*AI);
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} else if (MO.isRegMask()) {
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Regs.setBitsNotInMask(MO.getRegMask());
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}
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}
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}
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}
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}
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void llvm::calculateDbgEntityHistory(const MachineFunction *MF,
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const TargetRegisterInfo *TRI,
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DbgValueHistoryMap &DbgValues,
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DbgLabelInstrMap &DbgLabels) {
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BitVector ChangingRegs(TRI->getNumRegs());
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collectChangingRegs(MF, TRI, ChangingRegs);
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const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
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unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
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RegDescribedVarsMap RegVars;
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for (const auto &MBB : *MF) {
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for (const auto &MI : MBB) {
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if (!MI.isDebugInstr()) {
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// Not a DBG_VALUE instruction. It may clobber registers which describe
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// some variables.
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for (const MachineOperand &MO : MI.operands()) {
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if (MO.isReg() && MO.isDef() && MO.getReg()) {
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// Ignore call instructions that claim to clobber SP. The AArch64
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// backend does this for aggregate function arguments.
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if (MI.isCall() && MO.getReg() == SP)
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continue;
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// If this is a virtual register, only clobber it since it doesn't
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// have aliases.
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if (TRI->isVirtualRegister(MO.getReg()))
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clobberRegisterUses(RegVars, MO.getReg(), DbgValues, MI);
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// If this is a register def operand, it may end a debug value
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// range.
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else {
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for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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++AI)
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if (ChangingRegs.test(*AI))
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clobberRegisterUses(RegVars, *AI, DbgValues, MI);
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}
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} else if (MO.isRegMask()) {
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// If this is a register mask operand, clobber all debug values in
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// non-CSRs.
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for (unsigned I : ChangingRegs.set_bits()) {
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// Don't consider SP to be clobbered by register masks.
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if (unsigned(I) != SP && TRI->isPhysicalRegister(I) &&
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MO.clobbersPhysReg(I)) {
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clobberRegisterUses(RegVars, I, DbgValues, MI);
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}
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}
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}
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}
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continue;
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}
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if (MI.isDebugValue()) {
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assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
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// Use the base variable (without any DW_OP_piece expressions)
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// as index into History. The full variables including the
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// piece expressions are attached to the MI.
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const DILocalVariable *RawVar = MI.getDebugVariable();
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assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
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"Expected inlined-at fields to agree");
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InlinedEntity Var(RawVar, MI.getDebugLoc()->getInlinedAt());
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if (unsigned PrevReg = DbgValues.getRegisterForVar(Var))
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dropRegDescribedVar(RegVars, PrevReg, Var);
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DbgValues.startInstrRange(Var, MI);
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if (unsigned NewReg = isDescribedByReg(MI))
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addRegDescribedVar(RegVars, NewReg, Var);
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} else if (MI.isDebugLabel()) {
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assert(MI.getNumOperands() == 1 && "Invalid DBG_LABEL instruction!");
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const DILabel *RawLabel = MI.getDebugLabel();
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assert(RawLabel->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
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"Expected inlined-at fields to agree");
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// When collecting debug information for labels, there is no MCSymbol
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// generated for it. So, we keep MachineInstr in DbgLabels in order
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// to query MCSymbol afterward.
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InlinedEntity L(RawLabel, MI.getDebugLoc()->getInlinedAt());
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DbgLabels.addInstr(L, MI);
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}
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}
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// Make sure locations for register-described variables are valid only
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// until the end of the basic block (unless it's the last basic block, in
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// which case let their liveness run off to the end of the function).
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if (!MBB.empty() && &MBB != &MF->back()) {
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for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
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auto CurElem = I++; // CurElem can be erased below.
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if (TRI->isVirtualRegister(CurElem->first) ||
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ChangingRegs.test(CurElem->first))
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clobberRegisterUses(RegVars, CurElem, DbgValues, MBB.back());
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}
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}
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}
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}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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LLVM_DUMP_METHOD void DbgValueHistoryMap::dump() const {
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dbgs() << "DbgValueHistoryMap:\n";
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for (const auto &VarRangePair : *this) {
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const InlinedEntity &Var = VarRangePair.first;
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const InstrRanges &Ranges = VarRangePair.second;
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const DILocalVariable *LocalVar = cast<DILocalVariable>(Var.first);
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const DILocation *Location = Var.second;
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dbgs() << " - " << LocalVar->getName() << " at ";
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if (Location)
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dbgs() << Location->getFilename() << ":" << Location->getLine() << ":"
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<< Location->getColumn();
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else
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dbgs() << "<unknown location>";
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dbgs() << " --\n";
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for (const InstrRange &Range : Ranges) {
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dbgs() << " Begin: " << *Range.first;
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if (Range.second)
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dbgs() << " End : " << *Range.second;
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dbgs() << "\n";
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}
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}
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}
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#endif
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