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llvm-project/llvm/lib/CodeGen/SelectionDAG
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Yeting Kuo 5a57ebcc43 [VP][RISCV] Add vp.abs and RISC-V support. 
RISC-V uses ISD::ABS lower method (abs x) -> (smax_vl x (sub_vl 0, x)) for ISD::VP_ABS.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141033
2023-01-06 15:18:12 +08:00
..
CMakeLists.txt
[Support] Move TargetParsers to new component
2022-12-20 11:05:50 +00:00
DAGCombiner.cpp
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
2023-01-05 14:11:08 +01:00
FastISel.cpp
[MC] Consistently use MCInstrDesc::getImplicitUses and getImplicitDefs. NFC.
2023-01-04 13:16:12 +00:00
FunctionLoweringInfo.cpp
Revert "[SelectionDAG] Do not second-guess alignment for alloca"
2022-12-15 10:55:18 -06:00
InstrEmitter.cpp
[SelectionDAG] Fix EmitCopyFromReg for cloned nodes
2022-12-21 10:44:45 +00:00
InstrEmitter.h
[SelectionDAG] Fix EmitCopyFromReg for cloned nodes
2022-12-21 10:44:45 +00:00
LegalizeDAG.cpp
[Intrinsic] Rename flt.rounds intrinsic to get.rounding
2022-12-19 15:22:39 +08:00
LegalizeFloatTypes.cpp
[SelectionDAG] Rewrite bfloat16 softening to use the "half promotion" path
2022-09-06 11:54:34 +02:00
LegalizeIntegerTypes.cpp
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
2023-01-05 14:11:08 +01:00
LegalizeTypes.cpp
[X86] Allow no X87 on 32-bit
2022-11-22 10:47:47 +08:00
LegalizeTypes.h
[Intrinsic] Rename flt.rounds intrinsic to get.rounding
2022-12-19 15:22:39 +08:00
LegalizeTypesGeneric.cpp
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
2023-01-05 14:11:08 +01:00
LegalizeVectorOps.cpp
[VP][RISCV] Add vp.ctlz/cttz and RISC-V support.
2023-01-04 15:15:01 +08:00
LegalizeVectorTypes.cpp
[VP][RISCV] Add vp.abs and RISC-V support.
2023-01-06 15:18:12 +08:00
ResourcePriorityQueue.cpp
…
ScheduleDAGFast.cpp
[MC] Consistently use MCInstrDesc::getImplicitUses and getImplicitDefs. NFC.
2023-01-04 13:16:12 +00:00
ScheduleDAGRRList.cpp
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
2023-01-05 14:11:08 +01:00
ScheduleDAGSDNodes.cpp
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
2023-01-05 14:11:08 +01:00
ScheduleDAGSDNodes.h
…
ScheduleDAGVLIW.cpp
…
SDNodeDbgValue.h
…
SelectionDAG.cpp
[DAGCombiner] Add a most basic combineShuffleToZeroExtendVectorInReg()
2022-12-26 22:54:03 +03:00
SelectionDAGAddressAnalysis.cpp
[CodeGen] llvm::Optional => std::optional
2022-12-13 09:06:36 +00:00
SelectionDAGBuilder.cpp
[VP][RISCV] Add vp.abs and RISC-V support.
2023-01-06 15:18:12 +08:00
SelectionDAGBuilder.h
[Assignment Tracking][Analysis] Add analysis pass
2022-12-09 16:17:37 +00:00
SelectionDAGDumper.cpp
[Intrinsic] Rename flt.rounds intrinsic to get.rounding
2022-12-19 15:22:39 +08:00
SelectionDAGISel.cpp
[DebugInfo][SelectionDAGISel] Do not drop all dbg.declares if one with empty metadata is found
2023-01-05 15:36:50 +00:00
SelectionDAGPrinter.cpp
…
SelectionDAGTargetInfo.cpp
…
StatepointLowering.cpp
[CodeGen] std::optional::value => operator*/operator->
2022-12-16 23:41:36 +00:00
StatepointLowering.h
…
TargetLowering.cpp
[SelectionDAG] Improve codegen for udiv by constant if any divisors are 1.
2023-01-05 08:41:44 -08:00