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161cfc6f39
In my previous PR (#123656) to update the names of AVX10.2 intrinsics and mnemonics, I have erroneously deleted `_ph` from few intrinsics. This PR corrects this.
321 lines
13 KiB
C
321 lines
13 KiB
C
/*===--------- avx10_2_512convertintrin.h - AVX10_2_512CONVERT -------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error \
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"Never use <avx10_2_512convertintrin.h> directly; include <immintrin.h> instead."
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#endif // __IMMINTRIN_H
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#ifdef __SSE2__
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#ifndef __AVX10_2_512CONVERTINTRIN_H
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#define __AVX10_2_512CONVERTINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS512 \
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__attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \
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__min_vector_width__(512)))
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static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_cvtx2ps_ph(__m512 __A,
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__m512 __B) {
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return (__m512h)__builtin_ia32_vcvt2ps2phx512_mask(
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(__v16sf)__A, (__v16sf)__B, (__v32hf)_mm512_setzero_ph(), (__mmask32)(-1),
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_MM_FROUND_CUR_DIRECTION);
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}
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static __inline__ __m512h __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtx2ps_ph(__m512h __W, __mmask32 __U, __m512 __A, __m512 __B) {
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return (__m512h)__builtin_ia32_vcvt2ps2phx512_mask(
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(__v16sf)__A, (__v16sf)__B, (__v32hf)__W, (__mmask32)__U,
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_MM_FROUND_CUR_DIRECTION);
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}
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static __inline__ __m512h __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtx2ps_ph(__mmask32 __U, __m512 __A, __m512 __B) {
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return (__m512h)__builtin_ia32_vcvt2ps2phx512_mask(
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(__v16sf)__A, (__v16sf)__B, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U,
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_MM_FROUND_CUR_DIRECTION);
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}
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#define _mm512_cvtx_round2ps_ph(A, B, R) \
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((__m512h)__builtin_ia32_vcvt2ps2phx512_mask( \
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(__v16sf)(A), (__v16sf)(B), (__v32hf)_mm512_undefined_ph(), \
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(__mmask32)(-1), (const int)(R)))
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#define _mm512_mask_cvtx_round2ps_ph(W, U, A, B, R) \
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((__m512h)__builtin_ia32_vcvt2ps2phx512_mask((__v16sf)(A), (__v16sf)(B), \
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(__v32hf)(W), (__mmask32)(U), \
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(const int)(R)))
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#define _mm512_maskz_cvtx_round2ps_ph(U, A, B, R) \
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((__m512h)__builtin_ia32_vcvt2ps2phx512_mask( \
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(__v16sf)(A), (__v16sf)(B), (__v32hf)_mm512_setzero_ph(), \
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(__mmask32)(U), (const int)(R)))
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_cvtbiasph_bf8(__m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2bf8_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
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(__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiasph_bf8(
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__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2bf8_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtbiasph_bf8(__mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2bf8_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
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(__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_cvtbiassph_bf8(__m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
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(__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_bf8(
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__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtbiassph_bf8(__mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
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(__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_cvtbiasph_hf8(__m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2hf8_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
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(__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiasph_hf8(
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__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2hf8_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtbiasph_hf8(__mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2hf8_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
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(__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_cvtbiassph_hf8(__m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
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(__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_hf8(
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__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtbiassph_hf8(__mmask32 __U, __m512i __A, __m512h __B) {
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return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
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(__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
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(__mmask32)__U);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_cvt2ph_bf8(__m512h __A,
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__m512h __B) {
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return (__m512i)__builtin_ia32_vcvt2ph2bf8_512((__v32hf)(__A),
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(__v32hf)(__B));
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvt2ph_bf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvt2ph_bf8(__A, __B), (__v64qi)__W);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvt2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvt2ph_bf8(__A, __B),
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(__v64qi)(__m512i)_mm512_setzero_si512());
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_cvts2ph_bf8(__m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_vcvt2ph2bf8s_512((__v32hf)(__A),
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(__v32hf)(__B));
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvts2ph_bf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvts2ph_bf8(__A, __B), (__v64qi)__W);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvts2ph_bf8(__mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvts2ph_bf8(__A, __B),
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(__v64qi)(__m512i)_mm512_setzero_si512());
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_cvt2ph_hf8(__m512h __A,
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__m512h __B) {
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return (__m512i)__builtin_ia32_vcvt2ph2hf8_512((__v32hf)(__A),
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(__v32hf)(__B));
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvt2ph_hf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvt2ph_hf8(__A, __B), (__v64qi)__W);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvt2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvt2ph_hf8(__A, __B),
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(__v64qi)(__m512i)_mm512_setzero_si512());
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_cvts2ph_hf8(__m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_vcvt2ph2hf8s_512((__v32hf)(__A),
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(__v32hf)(__B));
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvts2ph_hf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvts2ph_hf8(__A, __B), (__v64qi)__W);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvts2ph_hf8(__mmask64 __U, __m512h __A, __m512h __B) {
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return (__m512i)__builtin_ia32_selectb_512(
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(__mmask64)__U, (__v64qi)_mm512_cvts2ph_hf8(__A, __B),
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(__v64qi)(__m512i)_mm512_setzero_si512());
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}
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static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_cvthf8_ph(__m256i __A) {
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return (__m512h)__builtin_ia32_vcvthf8_2ph512_mask(
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(__v32qi)__A, (__v32hf)(__m512h)_mm512_undefined_ph(), (__mmask32)-1);
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}
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static __inline__ __m512h __DEFAULT_FN_ATTRS512
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_mm512_mask_cvthf8_ph(__m512h __W, __mmask32 __U, __m256i __A) {
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return (__m512h)__builtin_ia32_vcvthf8_2ph512_mask(
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(__v32qi)__A, (__v32hf)(__m512h)__W, (__mmask32)__U);
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}
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static __inline__ __m512h __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvthf8_ph(__mmask32 __U, __m256i __A) {
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return (__m512h)__builtin_ia32_vcvthf8_2ph512_mask(
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(__v32qi)__A, (__v32hf)(__m512h)_mm512_setzero_ph(), (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtph_bf8(__m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2bf8_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtph_bf8(__m256i __W, __mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2bf8_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtph_bf8(__mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2bf8_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_bf8(__m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtsph_bf8(__m256i __W, __mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtsph_bf8(__mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2bf8s_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtph_hf8(__m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2hf8_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtph_hf8(__m256i __W, __mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2hf8_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtph_hf8(__mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2hf8_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_cvtsph_hf8(__m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtsph_hf8(__m256i __W, __mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtsph_hf8(__mmask32 __U, __m512h __A) {
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return (__m256i)__builtin_ia32_vcvtph2hf8s_512_mask(
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(__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
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}
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static __inline __m512h __DEFAULT_FN_ATTRS512 _mm512_cvtbf8_ph(__m256i __A) {
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return _mm512_castsi512_ph(_mm512_slli_epi16(_mm512_cvtepi8_epi16(__A), 8));
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}
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static __inline __m512h __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtbf8_ph(__m512h __S, __mmask32 __U, __m256i __A) {
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return _mm512_castsi512_ph(
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_mm512_mask_slli_epi16((__m512i)__S, __U, _mm512_cvtepi8_epi16(__A), 8));
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}
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static __inline __m512h __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtbf8_ph(__mmask32 __U, __m256i __A) {
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return _mm512_castsi512_ph(
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_mm512_slli_epi16(_mm512_maskz_cvtepi8_epi16(__U, __A), 8));
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}
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#undef __DEFAULT_FN_ATTRS512
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#endif // __AVX10_2_512CONVERTINTRIN_H
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#endif // __SSE2__
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