mirror of
https://github.com/llvm/llvm-project.git
synced 2025-04-25 14:26:06 +00:00
a7a61e2701
ARM supports clz and ctz directly and both operations have well-defined results for zero. There is no disadvantage in performance to using the defined-at-zero versions of llvm.ctlz/cttz intrinsics. We're running into ARM-specific code written with the assumption that __builtin_clz(0) == 32, even though that value is technically undefined. The code is failing now because of llvm optimizations that are taking advantage of the undef behavior (specifically svn r147255). There's nothing wrong with that optimization on x86 where any incorrect assumptions about __builtin_clz(0) will quickly be exposed. For ARM, though, optimizations based on that undef behavior are likely to cause subtle bugs. Other targets with defined-at-zero clz/ctz support may want to override the default behavior as well. llvm-svn: 149086
9 lines
464 B
C
9 lines
464 B
C
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
|
|
// RUN: %clang_cc1 -triple arm-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK-ARM
|
|
|
|
int a(int a) {return __builtin_ctz(a) + __builtin_clz(a);}
|
|
// CHECK: call i32 @llvm.cttz.i32({{.*}}, i1 true)
|
|
// CHECK: call i32 @llvm.ctlz.i32({{.*}}, i1 true)
|
|
// CHECK-ARM: call i32 @llvm.cttz.i32({{.*}}, i1 false)
|
|
// CHECK-ARM: call i32 @llvm.ctlz.i32({{.*}}, i1 false)
|