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992a64aad3
This implements our original design now that LLVM is comfortable with
structs and arrays of scalable vector types. All SVE ACLE intrinsics
already use struct types so the effect of this change is purely the
types used for alloca and function parameters.
There should be no C/C++ user visible change with this patch.
47 lines
3.4 KiB
C++
47 lines
3.4 KiB
C++
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -emit-llvm -o - %s | FileCheck %s
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// CHECK-LABEL: @_Z3foo10svboolx2_t(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[ARG:%.*]] = alloca { <vscale x 16 x i1>, <vscale x 16 x i1> }, align 2
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// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca { <vscale x 16 x i1>, <vscale x 16 x i1> }, align 2
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// CHECK-NEXT: [[TMP0:%.*]] = insertvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } poison, <vscale x 16 x i1> [[ARG_COERCE0:%.*]], 0
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// CHECK-NEXT: [[TMP1:%.*]] = insertvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], <vscale x 16 x i1> [[ARG_COERCE1:%.*]], 1
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// CHECK-NEXT: store { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP1]], ptr [[ARG]], align 2
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// CHECK-NEXT: [[ARG1:%.*]] = load { <vscale x 16 x i1>, <vscale x 16 x i1> }, ptr [[ARG]], align 2
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// CHECK-NEXT: store { <vscale x 16 x i1>, <vscale x 16 x i1> } [[ARG1]], ptr [[ARG_ADDR]], align 2
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// CHECK-NEXT: [[TMP2:%.*]] = load { <vscale x 16 x i1>, <vscale x 16 x i1> }, ptr [[ARG_ADDR]], align 2
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// CHECK-NEXT: ret { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP2]]
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//
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__clang_svboolx2_t foo(__clang_svboolx2_t arg) { return arg; }
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__clang_svboolx2_t bar();
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// CHECK-LABEL: @_Z4foo2v(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[CALL:%.*]] = call { <vscale x 16 x i1>, <vscale x 16 x i1> } @_Z3barv()
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// CHECK-NEXT: ret { <vscale x 16 x i1>, <vscale x 16 x i1> } [[CALL]]
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//
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__clang_svboolx2_t foo2() { return bar(); }
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__clang_svboolx2_t bar2(__clang_svboolx2_t);
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// CHECK-LABEL: @_Z4foo310svboolx2_t(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[ARG:%.*]] = alloca { <vscale x 16 x i1>, <vscale x 16 x i1> }, align 2
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// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca { <vscale x 16 x i1>, <vscale x 16 x i1> }, align 2
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// CHECK-NEXT: [[COERCE:%.*]] = alloca { <vscale x 16 x i1>, <vscale x 16 x i1> }, align 2
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// CHECK-NEXT: [[TMP0:%.*]] = insertvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } poison, <vscale x 16 x i1> [[ARG_COERCE0:%.*]], 0
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// CHECK-NEXT: [[TMP1:%.*]] = insertvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], <vscale x 16 x i1> [[ARG_COERCE1:%.*]], 1
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// CHECK-NEXT: store { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP1]], ptr [[ARG]], align 2
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// CHECK-NEXT: [[ARG1:%.*]] = load { <vscale x 16 x i1>, <vscale x 16 x i1> }, ptr [[ARG]], align 2
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// CHECK-NEXT: store { <vscale x 16 x i1>, <vscale x 16 x i1> } [[ARG1]], ptr [[ARG_ADDR]], align 2
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// CHECK-NEXT: [[TMP2:%.*]] = load { <vscale x 16 x i1>, <vscale x 16 x i1> }, ptr [[ARG_ADDR]], align 2
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// CHECK-NEXT: store { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP2]], ptr [[COERCE]], align 2
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// CHECK-NEXT: [[COERCE_TUPLE:%.*]] = load { <vscale x 16 x i1>, <vscale x 16 x i1> }, ptr [[COERCE]], align 2
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// CHECK-NEXT: [[COERCE_EXTRACT0:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[COERCE_TUPLE]], 0
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// CHECK-NEXT: [[COERCE_EXTRACT1:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[COERCE_TUPLE]], 1
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// CHECK-NEXT: [[CALL:%.*]] = call { <vscale x 16 x i1>, <vscale x 16 x i1> } @_Z4bar210svboolx2_t(<vscale x 16 x i1> [[COERCE_EXTRACT0]], <vscale x 16 x i1> [[COERCE_EXTRACT1]])
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// CHECK-NEXT: ret { <vscale x 16 x i1>, <vscale x 16 x i1> } [[CALL]]
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//
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__clang_svboolx2_t foo3(__clang_svboolx2_t arg) { return bar2(arg); }
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