llvm-project/llvm/docs/AMDGPU/gfx1013_vaddr_a5639c.rst
Dmitry Preobrazhensky a1bd85cfc3 [AMDGPU][GFX1013][DOC][NFC] Update assembler syntax description
Summary of changes:
- Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205).
2022-12-13 14:44:02 +03:00

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.. _amdgpu_synid_gfx1013_vaddr_a5639c:
vaddr
=====
Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
This operand may be specified using either :ref:`standard VGPR syntax<amdgpu_synid_v>` or special :ref:`NSA VGPR syntax<amdgpu_synid_nsa>`.
*Size:* 1-12 dwords. Actual size depends on opcode, :ref:`dim<amdgpu_synid_dim>` and :ref:`a16<amdgpu_synid_a16>`.
*Operands:* :ref:`v<amdgpu_synid_v>`