llvm-project/llvm/docs/AMDGPU/gfx8_m_c141fc.rst
Dmitry Preobrazhensky 564d47db9e [AMDGPU][GFX8][DOC][NFC] Update assembler syntax description
Summary of changes:
- Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205).
- Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900).
- Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet).
- Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783).
- Minor corrections and improvements.
2022-12-13 13:54:28 +03:00

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.. _amdgpu_synid_gfx8_m_c141fc:
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This operand may be used with floating-point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.