llvm-project/llvm/docs/AMDGPU/gfx90a_vaddr_b73dc0.rst
Dmitry Preobrazhensky 1774f2e326 [AMDGPU][GFX90a][DOC][NFC] Update assembler syntax description
Summary of changes:
- Update MUBUF lds syntax (see https://reviews.llvm.org/D124485).
- Update SMEM syntax (see https://reviews.llvm.org/D127314).
- Enable src0=literal for v_madak*, v_madmk* (see https://reviews.llvm.org/D111067).
- Correct src0 operands of v_accvgpr_write_b32.
- Correct description of s_getreg/s_setreg (add TBA/TMA).
- Remove SYSMSG_OP_HOST_TRAP_ACK message.
- Minor bug fixing and improvements.
2022-06-29 13:31:09 +03:00

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.. _amdgpu_synid_gfx90a_vaddr_b73dc0:
vaddr
=====
This is an optional operand which may specify offset and/or index.
*Size:* 0, 1 or 2 dwords. Size is controlled by modifiers :ref:`offen<amdgpu_synid_offen>` and :ref:`idxen<amdgpu_synid_idxen>`:
* If only :ref:`idxen<amdgpu_synid_idxen>` is specified, this operand supplies an index. Size is 1 dword.
* If only :ref:`offen<amdgpu_synid_offen>` is specified, this operand supplies an offset. Size is 1 dword.
* If both modifiers are specified, index is in the first register and offset is in the second. Size is 2 dwords.
* If none of these modifiers are specified, this operand must be set to :ref:`off<amdgpu_synid_off>`.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`off<amdgpu_synid_off>`