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c4a60c9d34
This is an attempt to reland D42600 and enabling this optimisation by default. This also resolves the issue pointed out in the context of PGO build. Differential Revision: https://reviews.llvm.org/D42600
136 lines
4.8 KiB
LLVM
136 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -ppc-formprep-chain-commoning \
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; RUN: -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 < %s | FileCheck %s
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; Test that on 32 bit AIX, the chain commoning still works without crash.
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; addresses:
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; 1: base1 + offset
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; 2: + offset
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; 3: + offset
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; 4: + offset
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;
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; chains:
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; 1: base: base1 + offset, offsets: (0, offset)
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; 2: base: base1 + 3*offset, offsets: (0, offset)
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;
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; long long two_chain_same_offset_succ_i32(char *p, int offset, int base1, long long n) {
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; int o1 = base1 + offset;
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; int o2 = base1 + 2 * offset;
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; int o3 = base1 + 3 * offset;
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; int o4 = base1 + 4 * offset;
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; char *p1 = p + o1;
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; char *p2 = p + o2;
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; char *p3 = p + o3;
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; char *p4 = p + o4;
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; long long sum = 0;
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; for (long long i = 0; i < n; ++i) {
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; unsigned long x1 = *(unsigned long *)(p1 + i);
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; unsigned long x2 = *(unsigned long *)(p2 + i);
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; unsigned long x3 = *(unsigned long *)(p3 + i);
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; unsigned long x4 = *(unsigned long *)(p4 + i);
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; sum += x1 * x2 * x3 * x4;
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; }
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; return sum;
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; }
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;
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define i64 @two_chain_same_offset_succ_i32(ptr %p, i32 %offset, i32 %base1, i64 %n) {
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; CHECK-LABEL: two_chain_same_offset_succ_i32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmplwi r6, 0
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; CHECK-NEXT: cmpwi cr1, r6, 0
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; CHECK-NEXT: crandc 4*cr5+lt, 4*cr1+lt, eq
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; CHECK-NEXT: cmpwi cr1, r7, 0
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; CHECK-NEXT: bc 12, 4*cr5+lt, L..BB0_6
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
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; CHECK-NEXT: bc 12, 4*cr5+lt, L..BB0_6
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; CHECK-NEXT: # %bb.2: # %for.body.preheader
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; CHECK-NEXT: slwi r8, r4, 1
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; CHECK-NEXT: li r10, 0
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; CHECK-NEXT: li r11, 0
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; CHECK-NEXT: stw r30, -8(r1) # 4-byte Folded Spill
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; CHECK-NEXT: add r8, r4, r8
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; CHECK-NEXT: stw r31, -4(r1) # 4-byte Folded Spill
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; CHECK-NEXT: add r9, r5, r8
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; CHECK-NEXT: add r5, r5, r4
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; CHECK-NEXT: add r8, r3, r5
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; CHECK-NEXT: add r9, r3, r9
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; CHECK-NEXT: li r3, 0
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; CHECK-NEXT: li r5, 0
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; CHECK-NEXT: .align 4
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; CHECK-NEXT: L..BB0_3: # %for.body
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; CHECK-NEXT: #
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; CHECK-NEXT: lwz r12, 0(r8)
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; CHECK-NEXT: lwzx r0, r8, r4
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; CHECK-NEXT: lwz r31, 0(r9)
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; CHECK-NEXT: lwzx r30, r9, r4
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; CHECK-NEXT: addi r8, r8, 1
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; CHECK-NEXT: addi r9, r9, 1
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; CHECK-NEXT: mullw r12, r0, r12
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; CHECK-NEXT: mullw r12, r12, r31
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; CHECK-NEXT: mullw r12, r12, r30
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; CHECK-NEXT: addc r5, r5, r12
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; CHECK-NEXT: addze r3, r3
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; CHECK-NEXT: addic r11, r11, 1
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; CHECK-NEXT: addze r10, r10
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; CHECK-NEXT: cmplw r10, r6
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; CHECK-NEXT: cmpw cr1, r10, r6
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; CHECK-NEXT: crandc 4*cr5+lt, 4*cr1+lt, eq
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; CHECK-NEXT: cmplw cr1, r11, r7
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; CHECK-NEXT: bc 12, 4*cr5+lt, L..BB0_3
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; CHECK-NEXT: # %bb.4: # %for.body
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; CHECK-NEXT: #
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; CHECK-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
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; CHECK-NEXT: bc 12, 4*cr5+lt, L..BB0_3
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; CHECK-NEXT: # %bb.5:
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; CHECK-NEXT: lwz r31, -4(r1) # 4-byte Folded Reload
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; CHECK-NEXT: lwz r30, -8(r1) # 4-byte Folded Reload
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; CHECK-NEXT: mr r4, r5
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; CHECK-NEXT: blr
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; CHECK-NEXT: L..BB0_6:
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; CHECK-NEXT: li r3, 0
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; CHECK-NEXT: li r4, 0
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; CHECK-NEXT: blr
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entry:
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%add = add nsw i32 %base1, %offset
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%mul = shl nsw i32 %offset, 1
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%add1 = add nsw i32 %mul, %base1
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%mul2 = mul nsw i32 %offset, 3
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%add3 = add nsw i32 %mul2, %base1
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%mul4 = shl nsw i32 %offset, 2
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%add5 = add nsw i32 %mul4, %base1
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%add.ptr = getelementptr inbounds i8, ptr %p, i32 %add
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%add.ptr6 = getelementptr inbounds i8, ptr %p, i32 %add1
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%add.ptr7 = getelementptr inbounds i8, ptr %p, i32 %add3
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%add.ptr8 = getelementptr inbounds i8, ptr %p, i32 %add5
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%cmp49 = icmp sgt i64 %n, 0
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br i1 %cmp49, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.body, %entry
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%sum.0.lcssa = phi i64 [ 0, %entry ], [ %add19, %for.body ]
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ret i64 %sum.0.lcssa
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for.body: ; preds = %entry, %for.body
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%sum.051 = phi i64 [ %add19, %for.body ], [ 0, %entry ]
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%i.050 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%idx.ext = trunc i64 %i.050 to i32
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%add.ptr9 = getelementptr inbounds i8, ptr %add.ptr, i32 %idx.ext
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%0 = load i32, ptr %add.ptr9, align 4
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%add.ptr11 = getelementptr inbounds i8, ptr %add.ptr6, i32 %idx.ext
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%1 = load i32, ptr %add.ptr11, align 4
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%add.ptr13 = getelementptr inbounds i8, ptr %add.ptr7, i32 %idx.ext
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%2 = load i32, ptr %add.ptr13, align 4
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%add.ptr15 = getelementptr inbounds i8, ptr %add.ptr8, i32 %idx.ext
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%3 = load i32, ptr %add.ptr15, align 4
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%mul16 = mul i32 %1, %0
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%mul17 = mul i32 %mul16, %2
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%mul18 = mul i32 %mul17, %3
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%conv = zext i32 %mul18 to i64
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%add19 = add nuw nsw i64 %sum.051, %conv
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%inc = add nuw nsw i64 %i.050, 1
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%cmp = icmp slt i64 %inc, %n
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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}
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