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bcad050106
This implements arm, armeb, thumb, thumbeb PLT entries parsing support in ELF for llvm-objdump. Implementation is similar to AArch64MCInstrAnalysis::findPltEntries. PLT entry signatures are based on LLD code for PLT generation (ARM::writePlt). llvm-objdump tests are produced from lld/test/ELF/arm-plt-reloc.s, lld/test/ELF/armv8-thumb-plt-reloc.s.
1043 lines
31 KiB
C++
1043 lines
31 KiB
C++
//===- ELFObjectFile.cpp - ELF object file implementation -----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Part of the ELFObjectFile class implementation.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Object/ELFObjectFile.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/MC/MCInstrAnalysis.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Object/ELFTypes.h"
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#include "llvm/Object/Error.h"
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#include "llvm/Support/ARMAttributeParser.h"
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#include "llvm/Support/ARMBuildAttributes.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/HexagonAttributeParser.h"
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#include "llvm/Support/RISCVAttributeParser.h"
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#include "llvm/Support/RISCVAttributes.h"
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#include "llvm/TargetParser/RISCVISAInfo.h"
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#include "llvm/TargetParser/SubtargetFeature.h"
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#include "llvm/TargetParser/Triple.h"
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#include <algorithm>
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#include <cstddef>
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#include <cstdint>
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#include <memory>
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#include <optional>
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#include <string>
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#include <utility>
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using namespace llvm;
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using namespace object;
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const EnumEntry<unsigned> llvm::object::ElfSymbolTypes[NumElfSymbolTypes] = {
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{"None", "NOTYPE", ELF::STT_NOTYPE},
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{"Object", "OBJECT", ELF::STT_OBJECT},
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{"Function", "FUNC", ELF::STT_FUNC},
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{"Section", "SECTION", ELF::STT_SECTION},
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{"File", "FILE", ELF::STT_FILE},
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{"Common", "COMMON", ELF::STT_COMMON},
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{"TLS", "TLS", ELF::STT_TLS},
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{"Unknown", "<unknown>: 7", 7},
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{"Unknown", "<unknown>: 8", 8},
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{"Unknown", "<unknown>: 9", 9},
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{"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC},
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{"OS Specific", "<OS specific>: 11", 11},
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{"OS Specific", "<OS specific>: 12", 12},
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{"Proc Specific", "<processor specific>: 13", 13},
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{"Proc Specific", "<processor specific>: 14", 14},
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{"Proc Specific", "<processor specific>: 15", 15}
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};
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ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source)
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: ObjectFile(Type, Source) {}
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template <class ELFT>
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static Expected<std::unique_ptr<ELFObjectFile<ELFT>>>
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createPtr(MemoryBufferRef Object, bool InitContent) {
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auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent);
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if (Error E = Ret.takeError())
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return std::move(E);
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return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret));
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}
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Expected<std::unique_ptr<ObjectFile>>
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ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) {
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std::pair<unsigned char, unsigned char> Ident =
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getElfArchType(Obj.getBuffer());
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std::size_t MaxAlignment =
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1ULL << llvm::countr_zero(
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reinterpret_cast<uintptr_t>(Obj.getBufferStart()));
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if (MaxAlignment < 2)
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return createError("Insufficient alignment");
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if (Ident.first == ELF::ELFCLASS32) {
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if (Ident.second == ELF::ELFDATA2LSB)
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return createPtr<ELF32LE>(Obj, InitContent);
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else if (Ident.second == ELF::ELFDATA2MSB)
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return createPtr<ELF32BE>(Obj, InitContent);
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else
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return createError("Invalid ELF data");
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} else if (Ident.first == ELF::ELFCLASS64) {
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if (Ident.second == ELF::ELFDATA2LSB)
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return createPtr<ELF64LE>(Obj, InitContent);
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else if (Ident.second == ELF::ELFDATA2MSB)
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return createPtr<ELF64BE>(Obj, InitContent);
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else
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return createError("Invalid ELF data");
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}
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return createError("Invalid ELF class");
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}
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SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const {
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SubtargetFeatures Features;
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unsigned PlatformFlags = getPlatformFlags();
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switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
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case ELF::EF_MIPS_ARCH_1:
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break;
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case ELF::EF_MIPS_ARCH_2:
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Features.AddFeature("mips2");
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break;
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case ELF::EF_MIPS_ARCH_3:
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Features.AddFeature("mips3");
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break;
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case ELF::EF_MIPS_ARCH_4:
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Features.AddFeature("mips4");
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break;
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case ELF::EF_MIPS_ARCH_5:
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Features.AddFeature("mips5");
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break;
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case ELF::EF_MIPS_ARCH_32:
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Features.AddFeature("mips32");
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break;
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case ELF::EF_MIPS_ARCH_64:
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Features.AddFeature("mips64");
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break;
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case ELF::EF_MIPS_ARCH_32R2:
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Features.AddFeature("mips32r2");
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break;
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case ELF::EF_MIPS_ARCH_64R2:
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Features.AddFeature("mips64r2");
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break;
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case ELF::EF_MIPS_ARCH_32R6:
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Features.AddFeature("mips32r6");
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break;
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case ELF::EF_MIPS_ARCH_64R6:
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Features.AddFeature("mips64r6");
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break;
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default:
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llvm_unreachable("Unknown EF_MIPS_ARCH value");
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}
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switch (PlatformFlags & ELF::EF_MIPS_MACH) {
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case ELF::EF_MIPS_MACH_NONE:
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// No feature associated with this value.
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break;
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case ELF::EF_MIPS_MACH_OCTEON:
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Features.AddFeature("cnmips");
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break;
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default:
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llvm_unreachable("Unknown EF_MIPS_ARCH value");
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}
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if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
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Features.AddFeature("mips16");
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if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
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Features.AddFeature("micromips");
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return Features;
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}
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SubtargetFeatures ELFObjectFileBase::getARMFeatures() const {
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SubtargetFeatures Features;
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ARMAttributeParser Attributes;
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if (Error E = getBuildAttributes(Attributes)) {
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consumeError(std::move(E));
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return SubtargetFeatures();
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}
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// both ARMv7-M and R have to support thumb hardware div
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bool isV7 = false;
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std::optional<unsigned> Attr =
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Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
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if (Attr)
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isV7 = *Attr == ARMBuildAttrs::v7;
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Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
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if (Attr) {
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switch (*Attr) {
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case ARMBuildAttrs::ApplicationProfile:
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Features.AddFeature("aclass");
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break;
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case ARMBuildAttrs::RealTimeProfile:
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Features.AddFeature("rclass");
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if (isV7)
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Features.AddFeature("hwdiv");
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break;
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case ARMBuildAttrs::MicroControllerProfile:
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Features.AddFeature("mclass");
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if (isV7)
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Features.AddFeature("hwdiv");
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break;
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}
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}
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Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use);
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if (Attr) {
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switch (*Attr) {
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default:
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break;
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case ARMBuildAttrs::Not_Allowed:
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Features.AddFeature("thumb", false);
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Features.AddFeature("thumb2", false);
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break;
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case ARMBuildAttrs::AllowThumb32:
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Features.AddFeature("thumb2");
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break;
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}
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}
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Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch);
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if (Attr) {
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switch (*Attr) {
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default:
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break;
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case ARMBuildAttrs::Not_Allowed:
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Features.AddFeature("vfp2sp", false);
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Features.AddFeature("vfp3d16sp", false);
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Features.AddFeature("vfp4d16sp", false);
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break;
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case ARMBuildAttrs::AllowFPv2:
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Features.AddFeature("vfp2");
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break;
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case ARMBuildAttrs::AllowFPv3A:
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case ARMBuildAttrs::AllowFPv3B:
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Features.AddFeature("vfp3");
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break;
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case ARMBuildAttrs::AllowFPv4A:
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case ARMBuildAttrs::AllowFPv4B:
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Features.AddFeature("vfp4");
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break;
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}
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}
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Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch);
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if (Attr) {
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switch (*Attr) {
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default:
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break;
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case ARMBuildAttrs::Not_Allowed:
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Features.AddFeature("neon", false);
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Features.AddFeature("fp16", false);
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break;
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case ARMBuildAttrs::AllowNeon:
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Features.AddFeature("neon");
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break;
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case ARMBuildAttrs::AllowNeon2:
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Features.AddFeature("neon");
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Features.AddFeature("fp16");
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break;
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}
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}
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Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch);
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if (Attr) {
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switch (*Attr) {
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default:
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break;
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case ARMBuildAttrs::Not_Allowed:
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Features.AddFeature("mve", false);
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Features.AddFeature("mve.fp", false);
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break;
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case ARMBuildAttrs::AllowMVEInteger:
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Features.AddFeature("mve.fp", false);
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Features.AddFeature("mve");
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break;
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case ARMBuildAttrs::AllowMVEIntegerAndFloat:
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Features.AddFeature("mve.fp");
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break;
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}
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}
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Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use);
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if (Attr) {
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switch (*Attr) {
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default:
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break;
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case ARMBuildAttrs::DisallowDIV:
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Features.AddFeature("hwdiv", false);
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Features.AddFeature("hwdiv-arm", false);
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break;
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case ARMBuildAttrs::AllowDIVExt:
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Features.AddFeature("hwdiv");
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Features.AddFeature("hwdiv-arm");
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break;
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}
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}
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return Features;
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}
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static std::optional<std::string> hexagonAttrToFeatureString(unsigned Attr) {
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switch (Attr) {
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case 5:
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return "v5";
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case 55:
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return "v55";
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case 60:
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return "v60";
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case 62:
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return "v62";
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case 65:
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return "v65";
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case 67:
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return "v67";
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case 68:
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return "v68";
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case 69:
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return "v69";
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case 71:
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return "v71";
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case 73:
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return "v73";
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case 75:
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return "v75";
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default:
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return {};
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}
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}
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SubtargetFeatures ELFObjectFileBase::getHexagonFeatures() const {
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SubtargetFeatures Features;
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HexagonAttributeParser Parser;
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if (Error E = getBuildAttributes(Parser)) {
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// Return no attributes if none can be read.
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// This behavior is important for backwards compatibility.
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consumeError(std::move(E));
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return Features;
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}
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std::optional<unsigned> Attr;
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if ((Attr = Parser.getAttributeValue(HexagonAttrs::ARCH))) {
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if (std::optional<std::string> FeatureString =
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hexagonAttrToFeatureString(*Attr))
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Features.AddFeature(*FeatureString);
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}
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if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXARCH))) {
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std::optional<std::string> FeatureString =
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hexagonAttrToFeatureString(*Attr);
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// There is no corresponding hvx arch for v5 and v55.
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if (FeatureString && *Attr >= 60)
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Features.AddFeature("hvx" + *FeatureString);
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}
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if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXIEEEFP)))
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if (*Attr)
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Features.AddFeature("hvx-ieee-fp");
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if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXQFLOAT)))
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if (*Attr)
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Features.AddFeature("hvx-qfloat");
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if ((Attr = Parser.getAttributeValue(HexagonAttrs::ZREG)))
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if (*Attr)
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Features.AddFeature("zreg");
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if ((Attr = Parser.getAttributeValue(HexagonAttrs::AUDIO)))
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if (*Attr)
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Features.AddFeature("audio");
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if ((Attr = Parser.getAttributeValue(HexagonAttrs::CABAC)))
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if (*Attr)
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Features.AddFeature("cabac");
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return Features;
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}
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Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const {
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SubtargetFeatures Features;
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unsigned PlatformFlags = getPlatformFlags();
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if (PlatformFlags & ELF::EF_RISCV_RVC) {
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Features.AddFeature("zca");
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}
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RISCVAttributeParser Attributes;
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if (Error E = getBuildAttributes(Attributes)) {
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return std::move(E);
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}
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std::optional<StringRef> Attr =
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Attributes.getAttributeString(RISCVAttrs::ARCH);
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if (Attr) {
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auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr);
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if (!ParseResult)
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return ParseResult.takeError();
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auto &ISAInfo = *ParseResult;
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if (ISAInfo->getXLen() == 32)
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Features.AddFeature("64bit", false);
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else if (ISAInfo->getXLen() == 64)
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Features.AddFeature("64bit");
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else
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llvm_unreachable("XLEN should be 32 or 64.");
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Features.addFeaturesVector(ISAInfo->toFeatures());
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}
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return Features;
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}
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SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const {
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SubtargetFeatures Features;
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switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) {
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case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT:
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break;
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case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT:
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Features.AddFeature("d");
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// D implies F according to LoongArch ISA spec.
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[[fallthrough]];
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case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT:
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Features.AddFeature("f");
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break;
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}
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return Features;
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}
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Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const {
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switch (getEMachine()) {
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case ELF::EM_MIPS:
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return getMIPSFeatures();
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case ELF::EM_ARM:
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return getARMFeatures();
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case ELF::EM_RISCV:
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return getRISCVFeatures();
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case ELF::EM_LOONGARCH:
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return getLoongArchFeatures();
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case ELF::EM_HEXAGON:
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return getHexagonFeatures();
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default:
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return SubtargetFeatures();
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}
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}
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std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const {
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switch (getEMachine()) {
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case ELF::EM_AMDGPU:
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return getAMDGPUCPUName();
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case ELF::EM_CUDA:
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return getNVPTXCPUName();
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case ELF::EM_PPC:
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case ELF::EM_PPC64:
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return StringRef("future");
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case ELF::EM_BPF:
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return StringRef("v4");
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default:
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return std::nullopt;
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}
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}
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StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
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assert(getEMachine() == ELF::EM_AMDGPU);
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unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH;
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switch (CPU) {
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// Radeon HD 2000/3000 Series (R600).
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case ELF::EF_AMDGPU_MACH_R600_R600:
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return "r600";
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case ELF::EF_AMDGPU_MACH_R600_R630:
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return "r630";
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case ELF::EF_AMDGPU_MACH_R600_RS880:
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return "rs880";
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case ELF::EF_AMDGPU_MACH_R600_RV670:
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return "rv670";
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// Radeon HD 4000 Series (R700).
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case ELF::EF_AMDGPU_MACH_R600_RV710:
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return "rv710";
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case ELF::EF_AMDGPU_MACH_R600_RV730:
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return "rv730";
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case ELF::EF_AMDGPU_MACH_R600_RV770:
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return "rv770";
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// Radeon HD 5000 Series (Evergreen).
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case ELF::EF_AMDGPU_MACH_R600_CEDAR:
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return "cedar";
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case ELF::EF_AMDGPU_MACH_R600_CYPRESS:
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return "cypress";
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case ELF::EF_AMDGPU_MACH_R600_JUNIPER:
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return "juniper";
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case ELF::EF_AMDGPU_MACH_R600_REDWOOD:
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return "redwood";
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case ELF::EF_AMDGPU_MACH_R600_SUMO:
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return "sumo";
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// Radeon HD 6000 Series (Northern Islands).
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case ELF::EF_AMDGPU_MACH_R600_BARTS:
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return "barts";
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case ELF::EF_AMDGPU_MACH_R600_CAICOS:
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return "caicos";
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case ELF::EF_AMDGPU_MACH_R600_CAYMAN:
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return "cayman";
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case ELF::EF_AMDGPU_MACH_R600_TURKS:
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return "turks";
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// AMDGCN GFX6.
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600:
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return "gfx600";
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601:
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return "gfx601";
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602:
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return "gfx602";
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|
|
// AMDGCN GFX7.
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700:
|
|
return "gfx700";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701:
|
|
return "gfx701";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702:
|
|
return "gfx702";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703:
|
|
return "gfx703";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704:
|
|
return "gfx704";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705:
|
|
return "gfx705";
|
|
|
|
// AMDGCN GFX8.
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801:
|
|
return "gfx801";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802:
|
|
return "gfx802";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803:
|
|
return "gfx803";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805:
|
|
return "gfx805";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810:
|
|
return "gfx810";
|
|
|
|
// AMDGCN GFX9.
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900:
|
|
return "gfx900";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902:
|
|
return "gfx902";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904:
|
|
return "gfx904";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906:
|
|
return "gfx906";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908:
|
|
return "gfx908";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909:
|
|
return "gfx909";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A:
|
|
return "gfx90a";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C:
|
|
return "gfx90c";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942:
|
|
return "gfx942";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX950:
|
|
return "gfx950";
|
|
|
|
// AMDGCN GFX10.
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010:
|
|
return "gfx1010";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011:
|
|
return "gfx1011";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012:
|
|
return "gfx1012";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013:
|
|
return "gfx1013";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030:
|
|
return "gfx1030";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031:
|
|
return "gfx1031";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032:
|
|
return "gfx1032";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033:
|
|
return "gfx1033";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034:
|
|
return "gfx1034";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035:
|
|
return "gfx1035";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1036:
|
|
return "gfx1036";
|
|
|
|
// AMDGCN GFX11.
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100:
|
|
return "gfx1100";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101:
|
|
return "gfx1101";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102:
|
|
return "gfx1102";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103:
|
|
return "gfx1103";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150:
|
|
return "gfx1150";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151:
|
|
return "gfx1151";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152:
|
|
return "gfx1152";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153:
|
|
return "gfx1153";
|
|
|
|
// AMDGCN GFX12.
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200:
|
|
return "gfx1200";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201:
|
|
return "gfx1201";
|
|
|
|
// Generic AMDGCN targets
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_GENERIC:
|
|
return "gfx9-generic";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC:
|
|
return "gfx9-4-generic";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC:
|
|
return "gfx10-1-generic";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC:
|
|
return "gfx10-3-generic";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC:
|
|
return "gfx11-generic";
|
|
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC:
|
|
return "gfx12-generic";
|
|
default:
|
|
llvm_unreachable("Unknown EF_AMDGPU_MACH value");
|
|
}
|
|
}
|
|
|
|
StringRef ELFObjectFileBase::getNVPTXCPUName() const {
|
|
assert(getEMachine() == ELF::EM_CUDA);
|
|
unsigned SM = getPlatformFlags() & ELF::EF_CUDA_SM;
|
|
|
|
switch (SM) {
|
|
// Fermi architecture.
|
|
case ELF::EF_CUDA_SM20:
|
|
return "sm_20";
|
|
case ELF::EF_CUDA_SM21:
|
|
return "sm_21";
|
|
|
|
// Kepler architecture.
|
|
case ELF::EF_CUDA_SM30:
|
|
return "sm_30";
|
|
case ELF::EF_CUDA_SM32:
|
|
return "sm_32";
|
|
case ELF::EF_CUDA_SM35:
|
|
return "sm_35";
|
|
case ELF::EF_CUDA_SM37:
|
|
return "sm_37";
|
|
|
|
// Maxwell architecture.
|
|
case ELF::EF_CUDA_SM50:
|
|
return "sm_50";
|
|
case ELF::EF_CUDA_SM52:
|
|
return "sm_52";
|
|
case ELF::EF_CUDA_SM53:
|
|
return "sm_53";
|
|
|
|
// Pascal architecture.
|
|
case ELF::EF_CUDA_SM60:
|
|
return "sm_60";
|
|
case ELF::EF_CUDA_SM61:
|
|
return "sm_61";
|
|
case ELF::EF_CUDA_SM62:
|
|
return "sm_62";
|
|
|
|
// Volta architecture.
|
|
case ELF::EF_CUDA_SM70:
|
|
return "sm_70";
|
|
case ELF::EF_CUDA_SM72:
|
|
return "sm_72";
|
|
|
|
// Turing architecture.
|
|
case ELF::EF_CUDA_SM75:
|
|
return "sm_75";
|
|
|
|
// Ampere architecture.
|
|
case ELF::EF_CUDA_SM80:
|
|
return "sm_80";
|
|
case ELF::EF_CUDA_SM86:
|
|
return "sm_86";
|
|
case ELF::EF_CUDA_SM87:
|
|
return "sm_87";
|
|
|
|
// Ada architecture.
|
|
case ELF::EF_CUDA_SM89:
|
|
return "sm_89";
|
|
|
|
// Hopper architecture.
|
|
case ELF::EF_CUDA_SM90:
|
|
return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_90a" : "sm_90";
|
|
default:
|
|
llvm_unreachable("Unknown EF_CUDA_SM value");
|
|
}
|
|
}
|
|
|
|
// FIXME Encode from a tablegen description or target parser.
|
|
void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const {
|
|
if (TheTriple.getSubArch() != Triple::NoSubArch)
|
|
return;
|
|
|
|
ARMAttributeParser Attributes;
|
|
if (Error E = getBuildAttributes(Attributes)) {
|
|
// TODO Propagate Error.
|
|
consumeError(std::move(E));
|
|
return;
|
|
}
|
|
|
|
std::string Triple;
|
|
// Default to ARM, but use the triple if it's been set.
|
|
if (TheTriple.isThumb())
|
|
Triple = "thumb";
|
|
else
|
|
Triple = "arm";
|
|
|
|
std::optional<unsigned> Attr =
|
|
Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
|
|
if (Attr) {
|
|
switch (*Attr) {
|
|
case ARMBuildAttrs::v4:
|
|
Triple += "v4";
|
|
break;
|
|
case ARMBuildAttrs::v4T:
|
|
Triple += "v4t";
|
|
break;
|
|
case ARMBuildAttrs::v5T:
|
|
Triple += "v5t";
|
|
break;
|
|
case ARMBuildAttrs::v5TE:
|
|
Triple += "v5te";
|
|
break;
|
|
case ARMBuildAttrs::v5TEJ:
|
|
Triple += "v5tej";
|
|
break;
|
|
case ARMBuildAttrs::v6:
|
|
Triple += "v6";
|
|
break;
|
|
case ARMBuildAttrs::v6KZ:
|
|
Triple += "v6kz";
|
|
break;
|
|
case ARMBuildAttrs::v6T2:
|
|
Triple += "v6t2";
|
|
break;
|
|
case ARMBuildAttrs::v6K:
|
|
Triple += "v6k";
|
|
break;
|
|
case ARMBuildAttrs::v7: {
|
|
std::optional<unsigned> ArchProfileAttr =
|
|
Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
|
|
if (ArchProfileAttr &&
|
|
*ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile)
|
|
Triple += "v7m";
|
|
else
|
|
Triple += "v7";
|
|
break;
|
|
}
|
|
case ARMBuildAttrs::v6_M:
|
|
Triple += "v6m";
|
|
break;
|
|
case ARMBuildAttrs::v6S_M:
|
|
Triple += "v6sm";
|
|
break;
|
|
case ARMBuildAttrs::v7E_M:
|
|
Triple += "v7em";
|
|
break;
|
|
case ARMBuildAttrs::v8_A:
|
|
Triple += "v8a";
|
|
break;
|
|
case ARMBuildAttrs::v8_R:
|
|
Triple += "v8r";
|
|
break;
|
|
case ARMBuildAttrs::v8_M_Base:
|
|
Triple += "v8m.base";
|
|
break;
|
|
case ARMBuildAttrs::v8_M_Main:
|
|
Triple += "v8m.main";
|
|
break;
|
|
case ARMBuildAttrs::v8_1_M_Main:
|
|
Triple += "v8.1m.main";
|
|
break;
|
|
case ARMBuildAttrs::v9_A:
|
|
Triple += "v9a";
|
|
break;
|
|
}
|
|
}
|
|
if (!isLittleEndian())
|
|
Triple += "eb";
|
|
|
|
TheTriple.setArchName(Triple);
|
|
}
|
|
|
|
std::vector<ELFPltEntry>
|
|
ELFObjectFileBase::getPltEntries(const MCSubtargetInfo &STI) const {
|
|
std::string Err;
|
|
const auto Triple = makeTriple();
|
|
const auto *T = TargetRegistry::lookupTarget(Triple, Err);
|
|
if (!T)
|
|
return {};
|
|
uint32_t JumpSlotReloc = 0, GlobDatReloc = 0;
|
|
switch (Triple.getArch()) {
|
|
case Triple::x86:
|
|
JumpSlotReloc = ELF::R_386_JUMP_SLOT;
|
|
GlobDatReloc = ELF::R_386_GLOB_DAT;
|
|
break;
|
|
case Triple::x86_64:
|
|
JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT;
|
|
GlobDatReloc = ELF::R_X86_64_GLOB_DAT;
|
|
break;
|
|
case Triple::aarch64:
|
|
case Triple::aarch64_be:
|
|
JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT;
|
|
break;
|
|
case Triple::arm:
|
|
case Triple::armeb:
|
|
case Triple::thumb:
|
|
case Triple::thumbeb:
|
|
JumpSlotReloc = ELF::R_ARM_JUMP_SLOT;
|
|
break;
|
|
case Triple::hexagon:
|
|
JumpSlotReloc = ELF::R_HEX_JMP_SLOT;
|
|
GlobDatReloc = ELF::R_HEX_GLOB_DAT;
|
|
break;
|
|
default:
|
|
return {};
|
|
}
|
|
std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo());
|
|
std::unique_ptr<const MCInstrAnalysis> MIA(
|
|
T->createMCInstrAnalysis(MII.get()));
|
|
if (!MIA)
|
|
return {};
|
|
std::vector<std::pair<uint64_t, uint64_t>> PltEntries;
|
|
std::optional<SectionRef> RelaPlt, RelaDyn;
|
|
uint64_t GotBaseVA = 0;
|
|
for (const SectionRef &Section : sections()) {
|
|
Expected<StringRef> NameOrErr = Section.getName();
|
|
if (!NameOrErr) {
|
|
consumeError(NameOrErr.takeError());
|
|
continue;
|
|
}
|
|
StringRef Name = *NameOrErr;
|
|
|
|
if (Name == ".rela.plt" || Name == ".rel.plt") {
|
|
RelaPlt = Section;
|
|
} else if (Name == ".rela.dyn" || Name == ".rel.dyn") {
|
|
RelaDyn = Section;
|
|
} else if (Name == ".got.plt") {
|
|
GotBaseVA = Section.getAddress();
|
|
} else if (Name == ".plt" || Name == ".plt.got") {
|
|
Expected<StringRef> PltContents = Section.getContents();
|
|
if (!PltContents) {
|
|
consumeError(PltContents.takeError());
|
|
return {};
|
|
}
|
|
llvm::append_range(
|
|
PltEntries,
|
|
MIA->findPltEntries(Section.getAddress(),
|
|
arrayRefFromStringRef(*PltContents), STI));
|
|
}
|
|
}
|
|
|
|
// Build a map from GOT entry virtual address to PLT entry virtual address.
|
|
DenseMap<uint64_t, uint64_t> GotToPlt;
|
|
for (auto [Plt, GotPlt] : PltEntries) {
|
|
uint64_t GotPltEntry = GotPlt;
|
|
// An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add
|
|
// _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address.
|
|
// See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit.
|
|
if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386)
|
|
GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA;
|
|
GotToPlt.insert(std::make_pair(GotPltEntry, Plt));
|
|
}
|
|
|
|
// Find the relocations in the dynamic relocation table that point to
|
|
// locations in the GOT for which we know the corresponding PLT entry.
|
|
std::vector<ELFPltEntry> Result;
|
|
auto handleRels = [&](iterator_range<relocation_iterator> Rels,
|
|
uint32_t RelType, StringRef PltSec) {
|
|
for (const auto &R : Rels) {
|
|
if (R.getType() != RelType)
|
|
continue;
|
|
auto PltEntryIter = GotToPlt.find(R.getOffset());
|
|
if (PltEntryIter != GotToPlt.end()) {
|
|
symbol_iterator Sym = R.getSymbol();
|
|
if (Sym == symbol_end())
|
|
Result.push_back(
|
|
ELFPltEntry{PltSec, std::nullopt, PltEntryIter->second});
|
|
else
|
|
Result.push_back(ELFPltEntry{PltSec, Sym->getRawDataRefImpl(),
|
|
PltEntryIter->second});
|
|
}
|
|
}
|
|
};
|
|
|
|
if (RelaPlt)
|
|
handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt");
|
|
|
|
// If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's
|
|
// x86 port places the PLT entry in the .plt.got section.
|
|
if (RelaDyn)
|
|
handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got");
|
|
|
|
return Result;
|
|
}
|
|
|
|
template <class ELFT>
|
|
Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl(
|
|
const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex,
|
|
std::vector<PGOAnalysisMap> *PGOAnalyses) {
|
|
using Elf_Shdr = typename ELFT::Shdr;
|
|
bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL;
|
|
std::vector<BBAddrMap> BBAddrMaps;
|
|
if (PGOAnalyses)
|
|
PGOAnalyses->clear();
|
|
|
|
const auto &Sections = cantFail(EF.sections());
|
|
auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> {
|
|
if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP &&
|
|
Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP_V0)
|
|
return false;
|
|
if (!TextSectionIndex)
|
|
return true;
|
|
Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link);
|
|
if (!TextSecOrErr)
|
|
return createError("unable to get the linked-to section for " +
|
|
describe(EF, Sec) + ": " +
|
|
toString(TextSecOrErr.takeError()));
|
|
assert(*TextSecOrErr >= Sections.begin() &&
|
|
"Text section pointer outside of bounds");
|
|
if (*TextSectionIndex !=
|
|
(unsigned)std::distance(Sections.begin(), *TextSecOrErr))
|
|
return false;
|
|
return true;
|
|
};
|
|
|
|
Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr =
|
|
EF.getSectionAndRelocations(IsMatch);
|
|
if (!SectionRelocMapOrErr)
|
|
return SectionRelocMapOrErr.takeError();
|
|
|
|
for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) {
|
|
if (IsRelocatable && !RelocSec)
|
|
return createError("unable to get relocation section for " +
|
|
describe(EF, *Sec));
|
|
Expected<std::vector<BBAddrMap>> BBAddrMapOrErr =
|
|
EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses);
|
|
if (!BBAddrMapOrErr) {
|
|
if (PGOAnalyses)
|
|
PGOAnalyses->clear();
|
|
return createError("unable to read " + describe(EF, *Sec) + ": " +
|
|
toString(BBAddrMapOrErr.takeError()));
|
|
}
|
|
std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(),
|
|
std::back_inserter(BBAddrMaps));
|
|
}
|
|
if (PGOAnalyses)
|
|
assert(PGOAnalyses->size() == BBAddrMaps.size() &&
|
|
"The same number of BBAddrMaps and PGOAnalysisMaps should be "
|
|
"returned when PGO information is requested");
|
|
return BBAddrMaps;
|
|
}
|
|
|
|
template <class ELFT>
|
|
static Expected<std::vector<VersionEntry>>
|
|
readDynsymVersionsImpl(const ELFFile<ELFT> &EF,
|
|
ELFObjectFileBase::elf_symbol_iterator_range Symbols) {
|
|
using Elf_Shdr = typename ELFT::Shdr;
|
|
const Elf_Shdr *VerSec = nullptr;
|
|
const Elf_Shdr *VerNeedSec = nullptr;
|
|
const Elf_Shdr *VerDefSec = nullptr;
|
|
// The user should ensure sections() can't fail here.
|
|
for (const Elf_Shdr &Sec : cantFail(EF.sections())) {
|
|
if (Sec.sh_type == ELF::SHT_GNU_versym)
|
|
VerSec = &Sec;
|
|
else if (Sec.sh_type == ELF::SHT_GNU_verdef)
|
|
VerDefSec = &Sec;
|
|
else if (Sec.sh_type == ELF::SHT_GNU_verneed)
|
|
VerNeedSec = &Sec;
|
|
}
|
|
if (!VerSec)
|
|
return std::vector<VersionEntry>();
|
|
|
|
Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr =
|
|
EF.loadVersionMap(VerNeedSec, VerDefSec);
|
|
if (!MapOrErr)
|
|
return MapOrErr.takeError();
|
|
|
|
std::vector<VersionEntry> Ret;
|
|
size_t I = 0;
|
|
for (const ELFSymbolRef &Sym : Symbols) {
|
|
++I;
|
|
Expected<const typename ELFT::Versym *> VerEntryOrErr =
|
|
EF.template getEntry<typename ELFT::Versym>(*VerSec, I);
|
|
if (!VerEntryOrErr)
|
|
return createError("unable to read an entry with index " + Twine(I) +
|
|
" from " + describe(EF, *VerSec) + ": " +
|
|
toString(VerEntryOrErr.takeError()));
|
|
|
|
Expected<uint32_t> FlagsOrErr = Sym.getFlags();
|
|
if (!FlagsOrErr)
|
|
return createError("unable to read flags for symbol with index " +
|
|
Twine(I) + ": " + toString(FlagsOrErr.takeError()));
|
|
|
|
bool IsDefault;
|
|
Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex(
|
|
(*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr,
|
|
(*FlagsOrErr) & SymbolRef::SF_Undefined);
|
|
if (!VerOrErr)
|
|
return createError("unable to get a version for entry " + Twine(I) +
|
|
" of " + describe(EF, *VerSec) + ": " +
|
|
toString(VerOrErr.takeError()));
|
|
|
|
Ret.push_back({(*VerOrErr).str(), IsDefault});
|
|
}
|
|
|
|
return Ret;
|
|
}
|
|
|
|
Expected<std::vector<VersionEntry>>
|
|
ELFObjectFileBase::readDynsymVersions() const {
|
|
elf_symbol_iterator_range Symbols = getDynamicSymbolIterators();
|
|
if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
|
|
return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
|
|
if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
|
|
return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
|
|
if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
|
|
return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
|
|
return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
|
|
Symbols);
|
|
}
|
|
|
|
Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap(
|
|
std::optional<unsigned> TextSectionIndex,
|
|
std::vector<PGOAnalysisMap> *PGOAnalyses) const {
|
|
if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
|
|
return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
|
|
if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
|
|
return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
|
|
if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
|
|
return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
|
|
return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
|
|
TextSectionIndex, PGOAnalyses);
|
|
}
|
|
|
|
StringRef ELFObjectFileBase::getCrelDecodeProblem(SectionRef Sec) const {
|
|
auto Data = Sec.getRawDataRefImpl();
|
|
if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
|
|
return Obj->getCrelDecodeProblem(Data);
|
|
if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
|
|
return Obj->getCrelDecodeProblem(Data);
|
|
if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
|
|
return Obj->getCrelDecodeProblem(Data);
|
|
return cast<ELF64BEObjectFile>(this)->getCrelDecodeProblem(Data);
|
|
}
|