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316ccf60c9
According to the report, better to keep the original strict compare operation as the loop condition with unsigned loop counters to make the loop countable. This allows further loop transformations. llvm-svn: 352526
248 lines
12 KiB
C++
248 lines
12 KiB
C++
// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s
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// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
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// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
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// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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// SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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// CHECK: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* }
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// CHECK: [[IMPLICIT_BARRIER_LOC:@.+]] = private unnamed_addr global %{{.+}} { i32 0, i32 66, i32 0, i32 0, i8*
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// CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
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void static_not_chunked(float *a, float *b, float *c, float *d) {
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
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#pragma omp for schedule(static) ordered
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// CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 66, i32 0, i32 4571423, i32 1, i32 1)
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//
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// CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]])
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// CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
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// CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
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// Loop header
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// CHECK: [[O_LOOP1_BODY]]
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// CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
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// CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
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// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
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// CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
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// CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
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// CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
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for (int i = 32000000; i > 33; i += -7) {
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// CHECK: [[LOOP1_BODY]]
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// Start of body: calculate i from IV:
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// CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]
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// CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7
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// CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]]
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// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]]
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// ... start of ordered region ...
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// CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... loop body ...
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// End of body: store into a[i]:
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// CHECK: store float [[RESULT:%.+]], float* {{%.+}}
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// CHECK-NOT: !llvm.access.group
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// CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... end of ordered region ...
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#pragma omp ordered
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a[i] = b[i] * c[i] * d[i];
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// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
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// CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
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// CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
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// CHECK-NEXT: call void @__kmpc_dispatch_fini_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: br label %{{.+}}
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}
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// CHECK: [[LOOP1_END]]
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// CHECK: [[O_LOOP1_END]]
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// CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
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// CHECK: ret void
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}
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// CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
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void dynamic1(float *a, float *b, float *c, float *d) {
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
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#pragma omp for schedule(dynamic) ordered
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// CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 67, i64 0, i64 16908287, i64 1, i64 1)
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//
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// CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
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// CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
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// CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
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// Loop header
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// CHECK: [[O_LOOP1_BODY]]
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// CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
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// CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
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// CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
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// CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
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// CHECK-NEXT: [[BOUND:%.+]] = add i64 [[UB]], 1
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// CHECK-NEXT: [[CMP:%.+]] = icmp ult i64 [[IV]], [[BOUND]]
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// CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
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for (unsigned long long i = 131071; i < 2147483647; i += 127) {
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// CHECK: [[LOOP1_BODY]]
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// Start of body: calculate i from IV:
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// CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]]
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// CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127
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// CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]]
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// CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]]
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// ... start of ordered region ...
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// CHECK-NEXT: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... loop body ...
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// End of body: store into a[i]:
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// CHECK: store float [[RESULT:%.+]], float* {{%.+}}
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// CHECK-NOT: !llvm.access.group
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// CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... end of ordered region ...
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#pragma omp ordered threads
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a[i] = b[i] * c[i] * d[i];
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// CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
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// CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1
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// CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
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// ... end iteration for ordered loop ...
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// CHECK-NEXT: call void @__kmpc_dispatch_fini_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: br label %{{.+}}
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}
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// CHECK: [[LOOP1_END]]
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// CHECK: [[O_LOOP1_END]]
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// CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
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// CHECK: ret void
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}
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// CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
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void test_auto(float *a, float *b, float *c, float *d) {
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unsigned int x = 0;
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unsigned int y = 0;
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
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#pragma omp for schedule(auto) collapse(2) ordered
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// CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 70, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1)
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//
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// CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]])
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// CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
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// CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
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// Loop header
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// CHECK: [[O_LOOP1_BODY]]
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// CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]]
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// CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]]
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// CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]]
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// CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]]
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// CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]]
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// CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
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// FIXME: When the iteration count of some nested loop is not a known constant,
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// we should pre-calculate it, like we do for the total number of iterations!
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for (char i = static_cast<char>(y); i <= '9'; ++i)
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for (x = 11; x > 0; --x) {
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// CHECK: [[LOOP1_BODY]]
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// Start of body: indices are calculated from IV:
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// CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
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// CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
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// ... start of ordered region ...
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// CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... loop body ...
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// End of body: store into a[i]:
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// CHECK: store float [[RESULT:%.+]], float* {{%.+}}
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// CHECK-NOT: !llvm.access.group
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// CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... end of ordered region ...
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#pragma omp ordered
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a[i] = b[i] * c[i] * d[i];
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// CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}}
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// CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1
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// CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]]
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// ... end iteration for ordered loop ...
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// CHECK-NEXT: call void @__kmpc_dispatch_fini_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: br label %{{.+}}
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}
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// CHECK: [[LOOP1_END]]
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// CHECK: [[O_LOOP1_END]]
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// CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
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// CHECK: ret void
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}
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// CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}})
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void runtime(float *a, float *b, float *c, float *d) {
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int x = 0;
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]])
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#pragma omp for collapse(2) schedule(runtime) ordered
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// CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 69, i32 0, i32 199, i32 1, i32 1)
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//
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// CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]])
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// CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0
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// CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]]
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// Loop header
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// CHECK: [[O_LOOP1_BODY]]
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// CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]]
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// CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]]
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// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]]
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// CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]]
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// CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]]
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// CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]]
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for (unsigned char i = '0' ; i <= '9'; ++i)
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for (x = -10; x < 10; ++x) {
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// CHECK: [[LOOP1_BODY]]
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// Start of body: indices are calculated from IV:
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// CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}}
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// CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}}
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// ... start of ordered region ...
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// CHECK: call void @__kmpc_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... loop body ...
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// End of body: store into a[i]:
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// CHECK: store float [[RESULT:%.+]], float* {{%.+}}
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// CHECK-NOT: !llvm.access.group
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// CHECK-NEXT: call void @__kmpc_end_ordered([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// ... end of ordered region ...
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#pragma omp ordered threads
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a[i] = b[i] * c[i] * d[i];
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// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
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// CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
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// CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
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// ... end iteration for ordered loop ...
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// CHECK-NEXT: call void @__kmpc_dispatch_fini_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]])
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// CHECK-NEXT: br label %{{.+}}
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}
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// CHECK: [[LOOP1_END]]
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// CHECK: [[O_LOOP1_END]]
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// CHECK: call {{.+}} @__kmpc_barrier([[IDENT_T_TY]]* [[IMPLICIT_BARRIER_LOC]], i32 [[GTID]])
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// CHECK: ret void
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}
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float f[10];
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// CHECK-LABEL: foo_simd
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void foo_simd(int low, int up) {
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// CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}}, !llvm.access.group !
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// CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}}), !llvm.access.group !
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#pragma omp simd
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for (int i = low; i < up; ++i) {
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f[i] = 0.0;
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#pragma omp ordered simd
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f[i] = 1.0;
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}
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// CHECK: store float 0.000000e+00, float* %{{.+}}, align {{[0-9]+}}
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// CHECK-NEXT: call void [[CAP_FUNC:@.+]](i32* %{{.+}})
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#pragma omp for simd ordered
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for (int i = low; i < up; ++i) {
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f[i] = 0.0;
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#pragma omp ordered simd
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f[i] = 1.0;
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}
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}
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// CHECK: define internal void [[CAP_FUNC]](i32* dereferenceable({{[0-9]+}}) %{{.+}}) #
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// CHECK: store float 1.000000e+00, float* %{{.+}}, align
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// CHECK-NEXT: ret void
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#endif // HEADER
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