Andrew Trick 32aea358e1 Added TargetRegisterInfo::getAllocatableClass. ...

The ensures that virtual registers always belong to an allocatable class.
If your target attempts to create a vreg for an operand that has no
allocatable register subclass, you will crash quickly.

This ensures that targets define register classes as intended.

llvm-svn: 156046

2012-05-03 01:14:37 +00:00

..

CMakeLists.txt

Refactor the SelectionDAG's 'dump' methods into their own .cpp file.

2012-03-13 05:47:27 +00:00

DAGCombiner.cpp

Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs.

2012-05-02 22:17:40 +00:00

FastISel.cpp

To ensure that we have more accurate line information for a block

2012-04-10 18:18:10 +00:00

FunctionLoweringInfo.cpp

Tabs, formatting and long lines oh my!

2012-02-24 01:59:01 +00:00

InstrEmitter.cpp

Added TargetRegisterInfo::getAllocatableClass.

2012-05-03 01:14:37 +00:00

InstrEmitter.h

Simplify EXTRACT_SUBREG emission.

2011-10-05 20:26:40 +00:00

LegalizeDAG.cpp

Register DAGUpdateListeners with SelectionDAG.

2012-04-20 22:08:46 +00:00

LegalizeFloatTypes.cpp

Convert assert(0) to llvm_unreachable

2012-02-05 08:31:47 +00:00

LegalizeIntegerTypes.cpp

Always compute all the bits in ComputeMaskedBits.

2012-04-04 12:51:34 +00:00

LegalizeTypes.cpp

Register DAGUpdateListeners with SelectionDAG.

2012-04-20 22:08:46 +00:00

LegalizeTypes.h

Register DAGUpdateListeners with SelectionDAG.

2012-04-20 22:08:46 +00:00

LegalizeTypesGeneric.cpp

Remove unnecessary default cases in switches that cover all enum values.

2012-01-10 16:47:17 +00:00

LegalizeVectorOps.cpp

When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type.

2012-04-15 15:08:09 +00:00

LegalizeVectorTypes.cpp

Removed useless switch for default case when switch was covering all the enum values

2012-04-04 00:53:04 +00:00

LLVMBuild.txt

LLVMBuild: Remove trailing newline, which irked me.

2011-12-12 19:48:00 +00:00

Makefile

…

ResourcePriorityQueue.cpp

misched preparation: rename core scheduler methods for consistency.

2012-03-07 23:00:49 +00:00

ScheduleDAGFast.cpp

Use uint16_t to store instruction implicit uses and defs. Reduces static data.

2012-03-08 08:22:45 +00:00

ScheduleDAGRRList.cpp

Source order scheduler should not preschedule nodes with multiple uses. rdar://11096639

2012-03-22 19:31:17 +00:00

ScheduleDAGSDNodes.cpp

Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.

2012-04-28 01:03:23 +00:00

ScheduleDAGSDNodes.h

misched preparation: rename core scheduler methods for consistency.

2012-03-07 23:00:49 +00:00

ScheduleDAGVLIW.cpp

misched preparation: rename core scheduler methods for consistency.

2012-03-07 23:00:49 +00:00

SDNodeDbgValue.h

Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.

2011-02-18 22:43:42 +00:00

SDNodeOrdering.h

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SelectionDAG.cpp

Use dyn_cast instead of checking opcode and cast.

2012-05-01 23:06:00 +00:00

SelectionDAGBuilder.cpp

Strip the pointer casts off of allocas so that the selection DAG can find them.

2012-05-01 22:50:45 +00:00

SelectionDAGBuilder.h

Inline implVisitAluOverflow by introducing a nested switch to convert the intrinsic to an nodetype.

2012-04-11 04:34:11 +00:00

SelectionDAGDumper.cpp

Refactor the SelectionDAG's 'dump' methods into their own .cpp file.

2012-03-13 05:47:27 +00:00

SelectionDAGISel.cpp

Add some constantness. No functionality change.

2012-04-30 23:41:30 +00:00

SelectionDAGPrinter.cpp

drop unneeded config.h includes

2011-12-22 23:04:07 +00:00

TargetLowering.cpp

Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors.

2012-04-21 20:08:32 +00:00

TargetSelectionDAGInfo.cpp

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