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llvm-project/llvm/lib/Target/AMDGPU
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Stanislav Mekhanoshin 3dfca24dda
[AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (#82710) 
The bug affects dpp forms of v_dot2_f32_f16. The encoding does not match
SP3 and does not set op_sel_hi bits properly.
2024-02-23 03:50:00 -08:00
..
AsmParser
[AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (#82423)
2024-02-20 16:34:40 -08:00
Disassembler
[AMDGPU] Remove DPP DecoderNamespaces. NFC. (#82491)
2024-02-22 11:18:18 +00:00
MCA
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
MCTargetDesc
[AMDGPU] Use bf16 instead of i16 for bfloat (#80908)
2024-02-16 15:58:30 -05:00
TargetInfo
[AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
2023-07-05 10:13:33 +01:00
Utils
[AMDGPU][NFC] Refactor SIInsertWaitcnts zero waitcnt generation (#82575)
2024-02-22 15:55:26 -08:00
AMDGPU.h
[AMDGPU] Add mark last scratch load pass (#75512)
2024-01-18 09:36:44 +01:00
AMDGPU.td
[AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (#82245)
2024-02-20 11:37:44 +00:00
AMDGPUAliasAnalysis.cpp
[AA] Skip the layer of indirection in returning conservative results.
2023-07-28 12:13:35 -07:00
AMDGPUAliasAnalysis.h
…
AMDGPUAlwaysInlinePass.cpp
…
AMDGPUAnnotateKernelFeatures.cpp
…
AMDGPUAnnotateUniformValues.cpp
…
AMDGPUArgumentUsageInfo.cpp
[AMDGPU] Add DAG ISel support for preloaded kernel arguments
2023-09-25 09:32:59 -07:00
AMDGPUArgumentUsageInfo.h
[AMDGPU] Miscellaneous clang-format changes (#75186)
2023-12-12 14:26:04 +00:00
AMDGPUAsmPrinter.cpp
[AMDGPU] Enable kernel arg preloading with gfx90a (#81180)
2024-02-12 22:33:29 -08:00
AMDGPUAsmPrinter.h
[AMDGPU] Remove AMDGPUAsmPrinter::isBlockOnlyReachableByFallthrough (#71407)
2023-11-06 16:29:52 +00:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] Fix scan of atomicFSub in AtomicOptimizer. (#66082)
2023-09-13 09:57:10 +05:30
AMDGPUAttributes.def
…
AMDGPUAttributor.cpp
[AMDGPU] Add an asm directive to track code_object_version (#76267)
2024-01-21 11:54:47 -05:00
AMDGPUCallingConv.td
AMDGPU: Make bf16/v2bf16 legal types (#76215)
2024-01-04 22:31:18 +07:00
AMDGPUCallLowering.cpp
[AMDGPU] Add an asm directive to track code_object_version (#76267)
2024-01-21 11:54:47 -05:00
AMDGPUCallLowering.h
[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186)
2023-11-06 12:30:07 +01:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU] Use correct number of bits needed for div/rem shrinking (#80622)
2024-02-06 21:32:28 +05:30
AMDGPUCombine.td
[AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673)
2024-02-22 09:47:36 +01:00
AMDGPUCombinerHelper.cpp
[AMDGPU] Min/max changes for GFX12 (#75214)
2023-12-13 14:18:10 +01:00
AMDGPUCombinerHelper.h
[llvm] Fix include guards
2023-06-13 10:47:18 +01:00
AMDGPUCtorDtorLowering.cpp
[llvm] Replace calls to Type::getPointerTo (NFC)
2023-11-30 13:18:51 -06:00
AMDGPUCtorDtorLowering.h
…
AMDGPUExportClustering.cpp
…
AMDGPUExportClustering.h
…
AMDGPUFeatures.td
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
…
AMDGPUGISel.td
[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795)
2024-01-24 13:43:07 +01:00
AMDGPUGlobalISelDivergenceLowering.cpp
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)
2024-02-05 14:07:01 +01:00
AMDGPUGlobalISelUtils.cpp
[llvm] Move CodeGenTypes library to its own directory (#79444)
2024-01-25 12:01:31 -05:00
AMDGPUGlobalISelUtils.h
[Target] Remove unnecessary includes (NFC)
2023-12-07 21:03:56 -08:00
AMDGPUHSAMetadataStreamer.cpp
[AMDGPU] Introduce Code Object V6 (#76954)
2024-02-05 08:19:53 +01:00
AMDGPUHSAMetadataStreamer.h
[AMDGPU] Introduce Code Object V6 (#76954)
2024-02-05 08:19:53 +01:00
AMDGPUIGroupLP.cpp
[AMDGPU][IGLP]: Add SchedGroupMask::TRANS (#75416)
2023-12-19 16:54:18 -08:00
AMDGPUIGroupLP.h
[AMDGPU] [IGLP]: Fix assert (#73710)
2023-12-07 17:10:10 -08:00
AMDGPUImageIntrinsicOptimizer.cpp
[AMDGPU] Use llvm::none_of (NFC)
2024-01-24 00:27:37 -08:00
AMDGPUInsertDelayAlu.cpp
[AMDGPU] Add functions for composing and decomposing S_WAIT_DEPCTR operands
2023-07-04 11:02:12 +01:00
AMDGPUInsertSingleUseVDST.cpp
[AMDGPU] New AMDGPUInsertSingleUseVDST pass (#72388)
2023-11-24 10:23:06 +00:00
AMDGPUInstCombineIntrinsic.cpp
[ValueTracking][NFC] Pass SimplifyQuery to computeKnownFPClass family (#80657)
2024-02-06 02:30:12 +08:00
AMDGPUInstrInfo.cpp
Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"
2023-07-27 14:49:17 +05:30
AMDGPUInstrInfo.h
Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"
2023-07-27 14:49:17 +05:30
AMDGPUInstrInfo.td
[AMDGPU] Min/max changes for GFX12 (#75214)
2023-12-13 14:18:10 +01:00
AMDGPUInstructions.td
[AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (#82245)
2024-02-20 11:37:44 +00:00
AMDGPUInstructionSelector.cpp
[AMDGPU] Clean up functions for checking inline literals (#81282)
2024-02-15 12:11:51 -05:00
AMDGPUInstructionSelector.h
[AMDGPU] Clean up functions for checking inline literals (#81282)
2024-02-15 12:11:51 -05:00
AMDGPUISelDAGToDAG.cpp
Revert "Implement convergence control in MIR using SelectionDAG (#71785)"
2024-02-21 11:07:02 +05:30
AMDGPUISelDAGToDAG.h
[AMDGPU] Clean up functions for checking inline literals (#81282)
2024-02-15 12:11:51 -05:00
AMDGPUISelLowering.cpp
[CodeGen] Add ValueType v3i8 (NFCI). (#80826)
2024-02-08 16:54:12 +01:00
AMDGPUISelLowering.h
[AMDGPU] Remove unnecessary add instructions in ctlz.i8 (#77615)
2024-01-19 10:16:46 +00:00
AMDGPULateCodeGenPrepare.cpp
[AMDGPU] Do not widen scalar loads on GFX12 (#78724)
2024-01-19 15:30:07 +00:00
AMDGPULegalizerInfo.cpp
[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331)
2024-02-13 10:06:25 -06:00
AMDGPULegalizerInfo.h
[AMDGPU] New llvm.amdgcn.wave.id intrinsic (#79325)
2024-01-25 07:48:06 +00:00
AMDGPULibCalls.cpp
[ValueTracking][NFC] Pass SimplifyQuery to computeKnownFPClass family (#80657)
2024-02-06 02:30:12 +08:00
AMDGPULibFunc.cpp
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
2023-12-11 21:01:36 -08:00
AMDGPULibFunc.h
AMDGPU: Use pown instead of pow if known integral
2023-09-01 08:22:16 -04:00
AMDGPULowerKernelArguments.cpp
[AMDGPU] Enable kernel arg preloading with gfx90a (#81180)
2024-02-12 22:33:29 -08:00
AMDGPULowerKernelAttributes.cpp
[AMDGPU] Add an asm directive to track code_object_version (#76267)
2024-01-21 11:54:47 -05:00
AMDGPULowerModuleLDSPass.cpp
AMDGPU: Drop amdgpu-no-lds-kernel-id attribute in LDS lowering (#71481)
2024-01-10 00:12:40 +07:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Use a range-based for loop (NFC)
2024-01-29 18:46:12 -08:00
AMDGPUMachineFunction.cpp
[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273)
2024-01-04 19:05:12 +05:30
AMDGPUMachineFunction.h
[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273)
2024-01-04 19:05:12 +05:30
AMDGPUMachineModuleInfo.cpp
…
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
[DAG] clang-format createBranchMacroFusionDAGMutation calls. NFC.
2023-11-20 12:13:09 +00:00
AMDGPUMacroFusion.h
…
AMDGPUMarkLastScratchLoad.cpp
[AMDGPU] Add mark last scratch load pass (#75512)
2024-01-18 09:36:44 +01:00
AMDGPUMCInstLower.cpp
[AMDGPU] Fix expensive-checks build.
2023-07-05 10:26:21 +01:00
AMDGPUMCInstLower.h
…
AMDGPUMIRFormatter.cpp
…
AMDGPUMIRFormatter.h
…
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[NFC] Remove Type::getInt8PtrTy (#71029)
2023-11-07 17:26:26 +01:00
AMDGPUPerfHintAnalysis.cpp
…
AMDGPUPerfHintAnalysis.h
…
AMDGPUPostLegalizerCombiner.cpp
[AMDGPU][GlobalISel] Add fdiv / sqrt to rsq combine (#78673)
2024-02-22 09:47:36 +01:00
AMDGPUPredicateControl.td
[AMDGPU][TableGen][NFC] Combine predicates without using classes. (#82346)
2024-02-21 11:45:36 +00:00
AMDGPUPreLegalizerCombiner.cpp
[AArch64][GlobalISel] Refactor Combine G_CONCAT_VECTOR (#80866)
2024-02-15 10:09:20 +00:00
AMDGPUPrintfRuntimeBinding.cpp
Replace usage of StringRef::find_last_of with a string literal of size one by the equivalent char literal
2023-11-15 15:01:36 +01:00
AMDGPUPromoteAlloca.cpp
[AMDGPU][PromoteAlloca] Support memsets to ptr allocas (#80678)
2024-02-05 14:36:15 +01:00
AMDGPUPromoteKernelArguments.cpp
[llvm] Remove uses of getWithSamePointeeType() (NFC)
2023-07-18 12:07:09 +02:00
AMDGPUPTNote.h
…
AMDGPURegBankCombiner.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
AMDGPURegBankSelect.cpp
AMDGPU: Special case uniformity info for single lane workgroups
2023-06-28 07:25:48 -04:00
AMDGPURegBankSelect.h
…
AMDGPURegisterBankInfo.cpp
[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331)
2024-02-13 10:06:25 -06:00
AMDGPURegisterBankInfo.h
[AMDGPU] Make isScalarLoadLegal a member of AMDGPURegisterBankInfo. NFC.
2024-01-09 11:53:12 +00:00
AMDGPURegisterBanks.td
[AMDGPU][True16] Don't use the VGPR_LO/HI16 register classes. (#76440)
2023-12-28 11:48:25 +00:00
AMDGPURemoveIncompatibleFunctions.cpp
[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955)
2024-02-12 10:18:20 +01:00
AMDGPUResourceUsageAnalysis.cpp
[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529)
2024-01-25 21:32:37 -08:00
AMDGPUResourceUsageAnalysis.h
[Target][AMDGPU] Fix TSan error on AMDGPU Target. (#79529)
2024-01-25 21:32:37 -08:00
AMDGPURewriteOutArguments.cpp
[llvm] Stop including llvm/ADT/SmallSet.h (NFC)
2023-11-11 12:32:15 -08:00
AMDGPURewriteUndefForPHI.cpp
[AMDGPU] Do not preserve UniformityInfo (#76696)
2024-01-02 13:42:56 +05:30
AMDGPUSearchableTables.td
[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795)
2024-01-24 13:43:07 +01:00
AMDGPUSetWavePriority.cpp
…
AMDGPUSubtarget.cpp
[AMDGPU] Add an asm directive to track code_object_version (#76267)
2024-01-21 11:54:47 -05:00
AMDGPUSubtarget.h
[AMDGPU] Define new targets gfx1200 and gfx1201 (#73133)
2023-11-23 16:44:05 +00:00
AMDGPUTargetMachine.cpp
Revert "Implement convergence control in MIR using SelectionDAG (#71785)"
2024-02-21 11:07:02 +05:30
AMDGPUTargetMachine.h
Revert "Implement convergence control in MIR using SelectionDAG (#71785)"
2024-02-21 11:07:02 +05:30
AMDGPUTargetObjectFile.cpp
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
2023-12-11 21:01:36 -08:00
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
[TTI]Fallback to SingleSrcPermute shuffle kind, if no direct estimation for
2024-02-12 07:09:49 -05:00
AMDGPUTargetTransformInfo.h
GFX12: Add LoopDataPrefetchPass (#75625)
2023-12-19 08:32:16 +01:00
AMDGPUUnifyDivergentExitNodes.cpp
[AMDGPU] Do not preserve UniformityInfo (#76696)
2024-01-02 13:42:56 +05:30
AMDGPUUnifyDivergentExitNodes.h
[llvm] Fix include guards
2023-06-13 10:47:18 +01:00
AMDGPUUnifyMetadata.cpp
…
AMDKernelCodeT.h
…
BUFInstructions.td
[AMDGPU] Set predicates more consistently for BUF instructions (#81865)
2024-02-17 13:19:39 +00:00
CaymanInstructions.td
…
CMakeLists.txt
[AMDGPU] Add mark last scratch load pass (#75512)
2024-01-18 09:36:44 +01:00
DSDIRInstructions.td
[AMDGPU] Make use of defvar in DSDIR definitions. NFC.
2024-02-14 09:59:31 +00:00
DSInstructions.td
AMDGPU/NFC: Add predicate for supporting ds_add_f64 (#80379)
2024-02-02 08:29:25 -05:00
EvergreenInstructions.td
…
EXPInstructions.td
[AMDGPU] Refactor export instruction definitions. NFC. (#81738)
2024-02-14 15:10:04 +00:00
FLATInstructions.td
AMDGPU/NFC: Add predicate for supporting buffer/flat/global f64 atomics (#80209)
2024-01-31 17:35:32 -05:00
GCNCreateVOPD.cpp
[AMDGPU] Update VOP instructions for GFX12 (#74853)
2023-12-12 11:38:24 +01:00
GCNDPPCombine.cpp
[AMDGPU] Fix warnings about unused variables [NFC]
2024-01-25 09:35:10 +01:00
GCNHazardRecognizer.cpp
AMDGPU: Simplify else if to else in GCNHazardRecognizer
2024-01-30 08:17:04 +05:30
GCNHazardRecognizer.h
…
GCNILPSched.cpp
…
GCNIterativeScheduler.cpp
[AMDGPU] Fix GCNUpwardRPTracker. (#71186)
2023-11-10 13:44:10 +01:00
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
…
GCNNSAReassign.cpp
[AMDGPU] Do not run GCNNSAReassign pass for GFX12 (#78185)
2024-01-17 15:22:48 +00:00
GCNPreRALongBranchReg.cpp
[AMDGPU] Reserve SGPR pair when long branches are present
2023-06-29 16:50:46 -05:00
GCNPreRAOptimizations.cpp
…
GCNProcessors.td
[AMDGPU] Replace '.' with '-' in generic target names (#81718)
2024-02-14 15:19:04 +01:00
GCNRegPressure.cpp
[AMDGPU] Fix GCNUpwardRPTracker: max register pressure on defs. (#74422)
2023-12-08 11:27:08 +01:00
GCNRegPressure.h
[AMDGPU] Fix GCNUpwardRPTracker: max register pressure on defs. (#74422)
2023-12-08 11:27:08 +01:00
GCNRewritePartialRegUses.cpp
[AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (#69957)
2023-11-16 16:56:46 +01:00
GCNSchedStrategy.cpp
[AMDGPU] Fix typos. NFC
2024-01-26 12:04:58 +01:00
GCNSchedStrategy.h
[AMDGPU] Fix typos. NFC
2024-01-26 12:04:58 +01:00
GCNSubtarget.h
[AMDGPU] Make maximum hard clause size a subtarget feature (#81287)
2024-02-15 13:58:31 -06:00
GCNVOPDUtils.cpp
[AMDGPU] Update VOP instructions for GFX12 (#74853)
2023-12-12 11:38:24 +01:00
GCNVOPDUtils.h
…
InstCombineTables.td
…
MIMGInstructions.td
[AMDGPU] Set DecoderNamespace consistently for GFX10+ MIMG instructions (#81881)
2024-02-16 09:22:25 +00:00
R600.h
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
R600.td
[AMDGPU][NFC] Extend PredicateControl to support True16 predicates. (#82245)
2024-02-20 11:37:44 +00:00
R600AsmPrinter.cpp
…
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
…
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600FrameLowering.cpp
…
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
…
R600InstrInfo.h
…
R600InstrInfo.td
…
R600Instructions.td
[AMDGPU] Generic lowering for rint and nearbyint (#69596)
2023-11-14 18:49:21 +01:00
R600ISelDAGToDAG.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
R600ISelLowering.cpp
[Target] Use getConstantOperandVal (NFC)
2024-01-14 00:53:29 -08:00
R600ISelLowering.h
…
R600MachineCFGStructurizer.cpp
…
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600MCInstLower.cpp
…
R600OpenCLImageTypeLoweringPass.cpp
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
2023-12-11 21:01:36 -08:00
R600OptimizeVectorRegisters.cpp
[AMDGPU] Use llvm::all_of (NFC)
2024-01-30 22:12:07 -08:00
R600Packetizer.cpp
…
R600Processors.td
…
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
…
R600Subtarget.h
…
R600TargetMachine.cpp
Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866)
2024-02-01 09:50:44 -08:00
R600TargetMachine.h
Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866)
2024-02-01 09:50:44 -08:00
R600TargetTransformInfo.cpp
[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979)
2023-11-22 08:52:53 +00:00
R600TargetTransformInfo.h
…
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[llvm] Use Instruction::hasMetadata (NFC)
2024-01-27 22:20:22 -08:00
SIDefines.h
[AMDGPU] Fix decoder for BF16 inline constants (#82276)
2024-02-19 13:45:23 -08:00
SIFixSGPRCopies.cpp
[AMDGPU] Fix nondeterminism in SIFixSGPRCopies (#70644)
2023-10-31 11:47:42 +00:00
SIFixVGPRCopies.cpp
AMDGPU: Make SIFixVGPRCopies preserve everything
2023-07-06 10:26:21 -04:00
SIFoldOperands.cpp
[AMDGPU] Add v2bf16 for opsel immediate folding (#82435)
2024-02-20 14:55:44 -08:00
SIFormMemoryClauses.cpp
[AMDGPU] Make use of MachineInstr::all_defs and all_uses. NFCI.
2023-06-05 10:32:33 +01:00
SIFrameLowering.cpp
Revert "[AMDGPU] Compiler should synthesize private buffer resource descriptor from flat_scratch_init" (#81234)
2024-02-09 09:57:38 +01:00
SIFrameLowering.h
Revert "[AMDGPU] Compiler should synthesize private buffer resource descriptor from flat_scratch_init" (#81234)
2024-02-09 09:57:38 +01:00
SIInsertHardClauses.cpp
[AMDGPU] Make maximum hard clause size a subtarget feature (#81287)
2024-02-15 13:58:31 -06:00
SIInsertWaitcnts.cpp
[AMDGPU][NFC] Refactor SIInsertWaitcnts zero waitcnt generation (#82575)
2024-02-22 15:55:26 -08:00
SIInstrFormats.td
[AMDGPU] Consolidate SGPRSpill and VGPRSpill into single Spill bit (#81901)
2024-02-16 13:32:59 -05:00
SIInstrInfo.cpp
[AMDGPU] Use bf16 instead of i16 for bfloat (#80908)
2024-02-16 15:58:30 -05:00
SIInstrInfo.h
[AMDGPU] Consolidate SGPRSpill and VGPRSpill into single Spill bit (#81901)
2024-02-16 13:32:59 -05:00
SIInstrInfo.td
[AMDGPU] Split Dpp8FI and Dpp16FI operands (#82379)
2024-02-22 09:40:46 +00:00
SIInstructions.td
Revert "Implement convergence control in MIR using SelectionDAG (#71785)"
2024-02-21 11:07:02 +05:30
SIISelLowering.cpp
[AMDGPU] fixes mistake in #82018 (#82223)
2024-02-21 13:12:03 -05:00
SIISelLowering.h
[AMDGPU] New llvm.amdgcn.wave.id intrinsic (#79325)
2024-01-25 07:48:06 +00:00
SILateBranchLowering.cpp
[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186)
2023-11-06 12:30:07 +01:00
SILoadStoreOptimizer.cpp
[AMDGPU] CodeGen for GFX12 VBUFFER instructions (#75492)
2023-12-15 13:45:03 +01:00
SILowerControlFlow.cpp
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
2023-09-14 14:10:14 -07:00
SILowerI1Copies.cpp
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)
2024-02-05 14:07:01 +01:00
SILowerI1Copies.h
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)
2024-02-05 14:07:01 +01:00
SILowerSGPRSpills.cpp
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
SILowerWWMCopies.cpp
Reapply "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"
2023-07-31 20:15:45 -04:00
SIMachineFunctionInfo.cpp
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
SIMachineFunctionInfo.h
[AMDGPU] Move architected SGPR implementation into isel (#79120)
2024-01-24 15:06:20 +00:00
SIMachineScheduler.cpp
…
SIMachineScheduler.h
…
SIMemoryLegalizer.cpp
[AMDGPU][SIMemoryLegalizer] Fix order of GL0/1_INV on GFX10/11 (#81450)
2024-02-13 09:07:51 +01:00
SIModeRegister.cpp
[AMDGPU] Reapply 'Sign extend simm16 in setreg intrinsic' (#78492)
2024-01-17 17:23:46 -08:00
SIModeRegisterDefaults.cpp
[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)
2023-12-13 13:52:40 +01:00
SIModeRegisterDefaults.h
[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)
2023-12-13 13:52:40 +01:00
SIOptimizeExecMasking.cpp
[AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (#68293)
2023-11-02 10:36:27 +01:00
SIOptimizeExecMaskingPreRA.cpp
[MC] Add MCRegisterInfo::regunits for iteration over register units
2023-06-16 05:39:50 +03:00
SIOptimizeVGPRLiveRange.cpp
[AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange
2023-08-07 11:35:39 +05:30
SIPeepholeSDWA.cpp
[AMDGPU] PeepholeSDWA: Don't assume inst srcs are registers (#69576)
2023-10-19 12:13:45 +02:00
SIPostRABundler.cpp
[MC] Add MCRegisterInfo::regunits for iteration over register units
2023-06-16 05:39:50 +03:00
SIPreAllocateWWMRegs.cpp
[AMDGPU] Add option to pre-allocate SGPR spill VGPRs (#70626)
2023-11-13 12:21:18 +09:00
SIPreEmitPeephole.cpp
[AMDGPU] Use MachineBasicBlock::instrs (NFC)
2024-01-28 10:47:07 -08:00
SIProgramInfo.cpp
[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)
2023-12-13 13:52:40 +01:00
SIProgramInfo.h
[AMDGPU] Update IEEE and DX10_CLAMP for GFX12 (#75030)
2023-12-13 13:52:40 +01:00
SIRegisterInfo.cpp
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
SIRegisterInfo.h
[CodeGen] Make some includes explicit (NFC)
2023-11-24 14:43:18 +01:00
SIRegisterInfo.td
[AMDGPU] Fix decoder for BF16 inline constants (#82276)
2024-02-19 13:45:23 -08:00
SISchedule.td
[AMDGPU] Add pseudo scalar trans instructions for GFX12 (#75204)
2023-12-15 10:41:05 +01:00
SIShrinkInstructions.cpp
AMDGPU/NFC: Remove some bits from TSFlags (#81525)
2024-02-12 16:43:48 -05:00
SIWholeQuadMode.cpp
[AMDGPU] Add VDSDIR instructions for GFX12 (#75197)
2024-01-03 16:32:00 +01:00
SMInstructions.td
[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331)
2024-02-13 10:06:25 -06:00
SOPInstructions.td
[AMDGPU] Try decoding instructions longest first. NFCI. (#82014)
2024-02-20 12:09:21 +00:00
VIInstrFormats.td
…
VINTERPInstructions.td
[AMDGPU][AsmParser][NFC] Rename integer modifier operands to follow the convention. (#79284)
2024-01-25 11:40:42 +00:00
VOP1Instructions.td
[AMDGPU] Remove DPP DecoderNamespaces. NFC. (#82491)
2024-02-22 11:18:18 +00:00
VOP2Instructions.td
[AMDGPU] Remove DPP DecoderNamespaces. NFC. (#82491)
2024-02-22 11:18:18 +00:00
VOP3Instructions.td
[AMDGPU] Split Dpp8FI and Dpp16FI operands (#82379)
2024-02-22 09:40:46 +00:00
VOP3PInstructions.td
[AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (#82710)
2024-02-23 03:50:00 -08:00
VOPCInstructions.td
[AMDGPU] Remove DPP DecoderNamespaces. NFC. (#82491)
2024-02-22 11:18:18 +00:00
VOPDInstructions.td
[AMDGPU] Update VOP instructions for GFX12 (#74853)
2023-12-12 11:38:24 +01:00
VOPInstructions.td
[AMDGPU] Fix encoding of VOP3P dpp on GFX11 and GFX12 (#82710)
2024-02-23 03:50:00 -08:00