Andrew Trick 2ad0b37318 Added a check in the preRA scheduler for potential interference on a ...

induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.

Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing

llvm-svn: 129100

2011-04-07 19:54:57 +00:00

..

CMakeLists.txt

Removed a bunch of unnecessary target_link_libraries.

2010-09-28 22:39:14 +00:00

DAGCombiner.cpp

Add a RemoveFromWorklist method to DCI. This is needed to do some complicated

2011-04-02 02:40:26 +00:00

FastISel.cpp

Teach FastISel to support register-immediate-immediate instructions.

2011-03-11 21:33:55 +00:00

FunctionLoweringInfo.cpp

There are times when the landing pad won't have a call to 'eh.selector' in

2011-03-03 23:14:05 +00:00

InstrEmitter.cpp

Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.

2011-01-10 02:58:51 +00:00

InstrEmitter.h

Don't set kill flags for instructions which the scheduler has cloned.

2010-05-14 22:01:14 +00:00

LegalizeDAG.cpp

Revert 123704; it broke threaded LLVM.

2011-04-05 00:37:28 +00:00

LegalizeFloatTypes.cpp

Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.

2011-02-25 21:41:48 +00:00

LegalizeIntegerTypes.cpp

Revert commit 126684 "Use the correct shift amount type". It is only the correct

2011-03-04 14:28:59 +00:00

LegalizeTypes.cpp

Move ExpandAtomic into the integer expansion routines - it's only used there.

2011-01-11 00:36:08 +00:00

LegalizeTypes.h

PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.

2011-03-23 22:18:48 +00:00

LegalizeTypesGeneric.cpp

Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.

2010-11-23 03:31:01 +00:00

LegalizeVectorOps.cpp

Add support for legalizing UINT_TO_FP of vectors on platforms which do

2011-03-19 13:09:10 +00:00

LegalizeVectorTypes.cpp

PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.

2011-03-23 22:18:48 +00:00

Makefile

…

ScheduleDAGFast.cpp

Re-commit 127368 and 127371. They are exonerated.

2011-03-10 00:16:32 +00:00

ScheduleDAGList.cpp

Various bits of framework needed for precise machine-level selection

2010-12-24 05:03:26 +00:00

ScheduleDAGRRList.cpp

Added a check in the preRA scheduler for potential interference on a

2011-04-07 19:54:57 +00:00

ScheduleDAGSDNodes.cpp

Added a check in the preRA scheduler for potential interference on a

2011-04-07 19:54:57 +00:00

ScheduleDAGSDNodes.h

Added a check in the preRA scheduler for potential interference on a

2011-04-07 19:54:57 +00:00

SDNodeDbgValue.h

Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.

2011-02-18 22:43:42 +00:00

SDNodeOrdering.h

…

SelectionDAG.cpp

sext(undef) = 0, because the top bits will all be the same.

2011-03-15 02:22:10 +00:00

SelectionDAGBuilder.cpp

Revamp the SjLj "dispatch setup" intrinsic.

2011-04-05 01:37:43 +00:00

SelectionDAGBuilder.h

Turn SelectionDAGBuilder::GetRegistersForValue into a local function.

2011-03-26 16:35:10 +00:00

SelectionDAGISel.cpp

Added block number and name to isel debug output.

2011-03-23 01:38:28 +00:00

SelectionDAGPrinter.cpp

Pass the graph to the DOTGraphTraits.getEdgeAttributes().

2011-02-27 04:11:03 +00:00

TargetLowering.cpp

Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.

2011-04-01 00:42:02 +00:00

TargetSelectionDAGInfo.cpp

Implement a bunch more TargetSelectionDAGInfo infrastructure.

2010-05-11 17:31:57 +00:00