49d6e39eba
This PR add test cases for all types of bit conversation, it prepares for PR: https://github.com/llvm/llvm-project/pull/132899 All tests passed due to: 1. For DAG, pattern will not separate SReg and VReg. One of the sample is: ``` define <2 x double> @v_bitcast_v4f32_to_v2f64(<4 x float> inreg %a, i32 %b) { %cmp = icmp eq i32 %b, 0 br i1 %cmp, label %cmp.true, label %cmp.false cmp.true: %a1 = fadd <4 x float> %a, splat (float 1.000000e+00) %a2 = bitcast <4 x float> %a1 to <2 x double> br label %end cmp.false: %a3 = bitcast <4 x float> %a to <2 x double> br label %end end: %phi = phi <2 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ] ret <2 x double> %phi } ``` It suppose to select from scalar register patterns. But the Vreg pattern is matched is as follow: ``` Debug log: ISEL: Starting selection on root node: t3: v2f64 = bitcast t2 ISEL: Starting pattern match Initial Opcode index to 440336 Skipped scope entry (due to false predicate) at index 440339, continuing at 440367 Skipped scope entry (due to false predicate) at index 440368, continuing at 440396 Skipped scope entry (due to false predicate) at index 440397, continuing at 440435 Skipped scope entry (due to false predicate) at index 440436, continuing at 440467 Skipped scope entry (due to false predicate) at index 440468, continuing at 440499 Skipped scope entry (due to false predicate) at index 440500, continuing at 440552 Skipped scope entry (due to false predicate) at index 440553, continuing at 440587 Skipped scope entry (due to false predicate) at index 440588, continuing at 440622 Skipped scope entry (due to false predicate) at index 440623, continuing at 440657 Skipped scope entry (due to false predicate) at index 440658, continuing at 440692 Skipped scope entry (due to false predicate) at index 440693, continuing at 440727 Skipped scope entry (due to false predicate) at index 440728, continuing at 440769 Skipped scope entry (due to false predicate) at index 440770, continuing at 440798 Skipped scope entry (due to false predicate) at index 440799, continuing at 440836 Skipped scope entry (due to false predicate) at index 440837, continuing at 440870 TypeSwitch[v2f64] from 440873 to 440892 Patterns: /*440892*/ OPC_CompleteMatch, 1, 0, // Src: (bitconvert:{ *:[v2f64] } VReg_128:{ *:[v4f32] }:$src0) - Complexity = 3 // Dst: VReg_128:{ *:[v2f64] }:$src0 ``` 2. Global isel will use `Select_COPY` to select bitcast
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