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This function is called when some predecessor of an empty return block ends with a conditional branch, with both successors being empty ret blocks. Now, because of the way SimplifyCFG works, it might happen to simplify one of the blocks in a way that makes a conditional branch into an unconditional one, since it's destinations are now identical, but it might not have actually simplified said conditional branch into an unconditional one yet. So, we have to check that ourselves first, especially now that SimplifyCFG aggressively tail-merges all ret and resume blocks. Even if it was an unconditional branch already, `SimplifyCFGOpt::simplifyReturn()` doesn't call `FoldReturnIntoUncondBranch()` by default.
178 lines
6.7 KiB
LLVM
178 lines
6.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -phi-node-folding-threshold=2 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define i32 @test1(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[T1:%.*]] = icmp eq i32 [[B:%.*]], 0
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; CHECK-NEXT: [[T2:%.*]] = icmp sgt i32 [[C:%.*]], 1
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; CHECK-NEXT: [[T3:%.*]] = add i32 [[A:%.*]], 1
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[T2]], i32 [[T3]], i32 [[A]]
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; CHECK-NEXT: [[T4:%.*]] = select i1 [[T1]], i32 [[SPEC_SELECT]], i32 [[B]]
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; CHECK-NEXT: [[T5:%.*]] = sub i32 [[T4]], 1
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; CHECK-NEXT: ret i32 [[T5]]
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;
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entry:
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%t1 = icmp eq i32 %b, 0
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br i1 %t1, label %bb1, label %bb3
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bb1:
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%t2 = icmp sgt i32 %c, 1
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br i1 %t2, label %bb2, label %bb3
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bb2:
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%t3 = add i32 %a, 1
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br label %bb3
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bb3:
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%t4 = phi i32 [ %b, %entry ], [ %a, %bb1 ], [ %t3, %bb2 ]
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%t5 = sub i32 %t4, 1
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ret i32 %t5
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}
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define float @spec_select_fp1(float %a, float %b, float %c) {
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; CHECK-LABEL: @spec_select_fp1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[T1:%.*]] = fcmp oeq float [[B:%.*]], 0.000000e+00
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; CHECK-NEXT: br i1 [[T1]], label [[BB1:%.*]], label [[BB3:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: [[T2:%.*]] = fcmp ogt float [[C:%.*]], 1.000000e+00
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; CHECK-NEXT: br i1 [[T2]], label [[BB2:%.*]], label [[BB3]]
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; CHECK: bb2:
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; CHECK-NEXT: [[T3:%.*]] = fadd float [[A:%.*]], 1.000000e+00
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[T4:%.*]] = phi ninf float [ [[B]], [[ENTRY:%.*]] ], [ [[A]], [[BB1]] ], [ [[T3]], [[BB2]] ]
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; CHECK-NEXT: [[T5:%.*]] = fsub float [[T4]], 1.000000e+00
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; CHECK-NEXT: ret float [[T5]]
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;
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entry:
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%t1 = fcmp oeq float %b, 0.0
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br i1 %t1, label %bb1, label %bb3
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bb1:
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%t2 = fcmp ogt float %c, 1.0
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br i1 %t2, label %bb2, label %bb3
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bb2:
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%t3 = fadd float %a, 1.0
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br label %bb3
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bb3:
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%t4 = phi ninf float [ %b, %entry ], [ %a, %bb1 ], [ %t3, %bb2 ]
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%t5 = fsub float %t4, 1.0
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ret float %t5
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}
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define i8* @test4(i1* %dummy, i8* %a, i8* %b) {
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; Test that we don't speculate an arbitrarily large number of unfolded constant
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; expressions.
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COND1:%.*]] = load volatile i1, i1* [[DUMMY:%.*]], align 1
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; CHECK-NEXT: br i1 [[COND1]], label [[IF:%.*]], label [[END:%.*]]
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; CHECK: if:
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; CHECK-NEXT: [[COND2:%.*]] = load volatile i1, i1* [[DUMMY]], align 1
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; CHECK-NEXT: br i1 [[COND2]], label [[THEN:%.*]], label [[END]]
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; CHECK: then:
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[X1:%.*]] = phi i8* [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[B:%.*]], [[IF]] ], [ inttoptr (i64 1 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X2:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 2 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X3:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 3 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X4:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 4 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X5:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 5 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X6:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 6 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X7:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 7 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X8:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 8 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X9:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 9 to i8*), [[THEN]] ]
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; CHECK-NEXT: [[X10:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 10 to i8*), [[THEN]] ]
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; CHECK-NEXT: ret i8* [[X10]]
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;
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entry:
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%cond1 = load volatile i1, i1* %dummy
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br i1 %cond1, label %if, label %end
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if:
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%cond2 = load volatile i1, i1* %dummy
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br i1 %cond2, label %then, label %end
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then:
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br label %end
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end:
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%x1 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 1 to i8*), %then ]
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%x2 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 2 to i8*), %then ]
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%x3 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 3 to i8*), %then ]
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%x4 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 4 to i8*), %then ]
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%x5 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 5 to i8*), %then ]
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%x6 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 6 to i8*), %then ]
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%x7 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 7 to i8*), %then ]
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%x8 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 8 to i8*), %then ]
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%x9 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 9 to i8*), %then ]
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%x10 = phi i8* [ %a, %entry ], [ %b, %if ], [ inttoptr (i64 10 to i8*), %then ]
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ret i8* %x10
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}
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define i32* @test5(i32 %a, i32 %b, i32 %c, i32* dereferenceable(10) %ptr1, i32* dereferenceable(10) %ptr2, i32** dereferenceable(10) align 8 %ptr3) nofree nosync {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[T1:%.*]] = icmp eq i32 [[B:%.*]], 0
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; CHECK-NEXT: [[T2:%.*]] = icmp sgt i32 [[C:%.*]], 1
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; CHECK-NEXT: [[T3:%.*]] = load i32*, i32** [[PTR3:%.*]], align 8
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; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[T2]], i32* [[T3]], i32* [[PTR2:%.*]]
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; CHECK-NEXT: [[T4:%.*]] = select i1 [[T1]], i32* [[SPEC_SELECT]], i32* [[PTR1:%.*]]
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; CHECK-NEXT: ret i32* [[T4]]
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;
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entry:
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%t1 = icmp eq i32 %b, 0
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br i1 %t1, label %bb1, label %bb3
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bb1:
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%t2 = icmp sgt i32 %c, 1
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br i1 %t2, label %bb2, label %bb3
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bb2:
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%t3 = load i32*, i32** %ptr3, !dereferenceable !{i64 10}
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br label %bb3
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bb3:
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%t4 = phi i32* [ %ptr1, %entry ], [ %ptr2, %bb1 ], [ %t3, %bb2 ]
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ret i32* %t4
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}
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define float @spec_select_fp5(float %a, float %b, float %c) {
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; CHECK-LABEL: @spec_select_fp5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[T1:%.*]] = fcmp oeq float [[B:%.*]], 0.000000e+00
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; CHECK-NEXT: br i1 [[T1]], label [[BB1:%.*]], label [[BB3:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: [[T2:%.*]] = fcmp ogt float [[C:%.*]], 1.000000e+00
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; CHECK-NEXT: br i1 [[T2]], label [[BB2:%.*]], label [[BB3]]
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; CHECK: bb2:
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[T4:%.*]] = phi nsz float [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[B]], [[BB1]] ], [ [[C]], [[BB2]] ]
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; CHECK-NEXT: ret float [[T4]]
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;
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entry:
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%t1 = fcmp oeq float %b, 0.0
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br i1 %t1, label %bb1, label %bb3
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bb1:
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%t2 = fcmp ogt float %c, 1.0
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br i1 %t2, label %bb2, label %bb3
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bb2:
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br label %bb3
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bb3:
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%t4 = phi nsz float [ %a, %entry ], [ %b, %bb1 ], [ %c, %bb2 ]
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ret float %t4
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}
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