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5022f6bb81
This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.
This is an example of a function's body that uses the old syntax:
body:
- id: 0
name: entry
instructions:
- '%eax = MOV32r0 implicit-def %eflags'
- 'RETQ %eax'
...
The same body is now written like this:
body: |
bb.0.entry:
%eax = MOV32r0 implicit-def %eflags
RETQ %eax
...
This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:
BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
t2IT 1, 24, implicit-def %itstate
%s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
}
This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.
llvm-svn: 244982
90 lines
3.5 KiB
C++
90 lines
3.5 KiB
C++
//===- MIParser.h - Machine Instructions Parser ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the function that parses the machine instructions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
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#define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/StringRef.h"
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namespace llvm {
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class BasicBlock;
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class MachineBasicBlock;
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class MachineInstr;
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class MachineFunction;
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struct SlotMapping;
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class SMDiagnostic;
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class SourceMgr;
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struct PerFunctionMIParsingState {
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DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
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DenseMap<unsigned, unsigned> VirtualRegisterSlots;
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DenseMap<unsigned, int> FixedStackObjectSlots;
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DenseMap<unsigned, int> StackObjectSlots;
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DenseMap<unsigned, unsigned> ConstantPoolSlots;
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DenseMap<unsigned, unsigned> JumpTableSlots;
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};
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/// Parse the machine basic block definitions, and skip the machine
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/// instructions.
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///
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/// This function runs the first parsing pass on the machine function's body.
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/// It parses only the machine basic block definitions and creates the machine
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/// basic blocks in the given machine function.
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///
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/// The machine instructions aren't parsed during the first pass because all
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/// the machine basic blocks aren't defined yet - this makes it impossible to
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/// resolve the machine basic block references.
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///
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/// Return true if an error occurred.
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bool parseMachineBasicBlockDefinitions(MachineFunction &MF, StringRef Src,
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PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots,
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SMDiagnostic &Error);
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/// Parse the machine instructions.
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///
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/// This function runs the second parsing pass on the machine function's body.
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/// It skips the machine basic block definitions and parses only the machine
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/// instructions and basic block attributes like liveins and successors.
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///
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/// The second parsing pass assumes that the first parsing pass already ran
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/// on the given source string.
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///
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/// Return true if an error occurred.
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bool parseMachineInstructions(MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots, SMDiagnostic &Error);
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bool parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
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MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots, SMDiagnostic &Error);
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bool parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
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MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots,
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SMDiagnostic &Error);
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bool parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
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MachineFunction &MF, StringRef Src,
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const PerFunctionMIParsingState &PFS,
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const SlotMapping &IRSlots,
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SMDiagnostic &Error);
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} // end namespace llvm
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#endif
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