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llvm-project/llvm/utils/TableGen
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Valentin Clement e8d4038efb [openmp][openacc][NFC] Add wrapper for records in DirectiveEmitter 
Add wrapper classes to to access record's fields. This makes it easier to
pass record information to the diverse functions for code generation.

Reviewed By: jdenny

Differential Revision: https://reviews.llvm.org/D84612
2020-07-28 20:47:40 -04:00
..
GlobalISel
[TableGen] Avoid generating switch with just default
2020-06-02 19:48:07 +01:00
AsmMatcherEmitter.cpp
[MC] Move deprecation infos from MCTargetDesc to MCInstrInfo
2020-03-29 21:20:40 +02:00
AsmWriterEmitter.cpp
[TableGen] Fix non-standard escape warnings for braces in InstAlias
2020-05-28 09:36:24 +00:00
AsmWriterInst.cpp
[MCInstPrinter] Pass Address parameter to MCOI::OPERAND_PCREL typed operands. NFC
2020-03-26 08:21:15 -07:00
AsmWriterInst.h
[MCInstPrinter] Pass Address parameter to MCOI::OPERAND_PCREL typed operands. NFC
2020-03-26 08:21:15 -07:00
Attributes.cpp
Sort EnumAttr so it matches Attribute::operator<
2020-04-26 17:00:25 +02:00
CallingConvEmitter.cpp
[Alignment][NFC] Migrate HandleByVal to Align
2020-06-08 10:50:27 +00:00
CMakeLists.txt
[openmp] Base of tablegen generated OpenMP common declaration
2020-06-23 10:32:32 -04:00
CodeEmitterGen.cpp
…
CodeGenDAGPatterns.cpp
[ARM] Extra MVE select(binop) patterns
2020-07-22 14:08:29 +01:00
CodeGenDAGPatterns.h
CodeGenDAGPatterns.h - remove unnecessary ComplexPattern forward declaration. NFCI.
2020-07-20 15:17:19 +01:00
CodeGenHwModes.cpp
…
CodeGenHwModes.h
Explicitly include <cassert> when using assert
2020-03-02 22:45:28 +01:00
CodeGenInstruction.cpp
[TableGen] Handle (outs variable_ops)
2020-06-04 16:07:33 +03:00
CodeGenInstruction.h
Explicitly include <cassert> when using assert
2020-03-02 22:45:28 +01:00
CodeGenIntrinsics.h
[IR] NoFree IntrinsicProperty.
2020-06-30 11:26:00 +02:00
CodeGenMapTable.cpp
…
CodeGenRegisters.cpp
[TableGen] Report an error instead of asserting
2020-07-17 11:32:46 +01:00
CodeGenRegisters.h
[TableGen][GlobalISel] Rework RegisterBankEmitter for easier const correctness.
2020-03-18 19:52:23 +00:00
CodeGenSchedule.cpp
[TableGen][CGS] Print better errors on overlapping InstRW
2020-07-27 09:41:10 -06:00
CodeGenSchedule.h
…
CodeGenTarget.cpp
[MVT] Add new MVT types for RISC-V vector.
2020-07-01 01:07:50 +08:00
CodeGenTarget.h
…
CTagsEmitter.cpp
…
DAGISelEmitter.cpp
…
DAGISelMatcher.cpp
…
DAGISelMatcher.h
…
DAGISelMatcherEmitter.cpp
llvm-tblgen -gen-dag-isel: Hoist SmallVector TmpBuf
2020-04-25 20:41:04 -07:00
DAGISelMatcherGen.cpp
[TableGen] Fix register class handling in TableGen's DAG ISel Matcher Generator
2020-05-13 10:17:03 +01:00
DAGISelMatcherOpt.cpp
…
DFAEmitter.cpp
Fix DfaEmitter::visitDfaState() crash in MSVC x86 debug builds (PR44945)
2020-02-25 15:18:41 +01:00
DFAEmitter.h
DFAEmitter.h - remove unnecessary headers. NFC.
2020-05-08 14:53:10 +01:00
DFAPacketizerEmitter.cpp
Move DFA tables into the read-only data segmant.
2020-02-18 14:36:56 +01:00
DirectiveEmitter.cpp
[openmp][openacc][NFC] Add wrapper for records in DirectiveEmitter
2020-07-28 20:47:40 -04:00
DisassemblerEmitter.cpp
…
ExegesisEmitter.cpp
…
FastISelEmitter.cpp
…
FixedLenDecoderEmitter.cpp
[TableGen] Support combining AssemblerPredicates with ORs
2020-03-13 17:13:51 +00:00
GICombinerEmitter.cpp
[gicombiner] Allow disable-rule option to disable all-except-...
2020-06-16 16:57:16 -07:00
GlobalISelEmitter.cpp
TableGen: Check if pattern outputs matches instruction defs
2020-07-27 21:08:40 -04:00
InfoByHwMode.cpp
…
InfoByHwMode.h
…
InstrDocsEmitter.cpp
…
InstrInfoEmitter.cpp
TableGen: Don't reconstruct CodeGenDAGTarget
2020-05-23 12:15:44 -04:00
IntrinsicEmitter.cpp
[IR] NoFree IntrinsicProperty.
2020-06-30 11:26:00 +02:00
LLVMBuild.txt
…
OptEmitter.cpp
…
OptEmitter.h
…
OptParserEmitter.cpp
[clangd] Fix the build with clang <3.9.
2020-07-17 16:12:31 -06:00
OptRSTEmitter.cpp
Avoid including FileSystem.h from MemoryBuffer.h
2020-02-29 12:30:23 -08:00
PredicateExpander.cpp
…
PredicateExpander.h
…
PseudoLoweringEmitter.cpp
…
RegisterBankEmitter.cpp
Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes"
2020-03-20 11:02:50 +01:00
RegisterInfoEmitter.cpp
[TBLGEN] Emit register pressure set enum
2020-02-18 10:09:05 -08:00
RISCVCompressInstEmitter.cpp
[RISCV] Support negative constants in CompressInstEmitter
2020-03-26 15:23:38 +00:00
SDNodeProperties.cpp
…
SDNodeProperties.h
…
SearchableTableEmitter.cpp
[TableGen] Add error messages
2020-06-23 11:52:12 +02:00
SequenceToOffsetTable.h
…
SubtargetEmitter.cpp
[MC] Widen the functional unit type from 32 to 64 bits.
2020-02-24 09:37:00 +01:00
SubtargetFeatureInfo.cpp
SubtargetFeatureInfo.h - remove unnecessary include and forward declarations. NFCI.
2020-07-20 13:39:24 +01:00
SubtargetFeatureInfo.h
SubtargetFeatureInfo.h - remove unnecessary include and forward declarations. NFCI.
2020-07-20 13:39:24 +01:00
TableGen.cpp
[Support] Use InitLLVM in llvm-stress, sancov and TableGen
2020-07-28 07:50:45 -04:00
TableGenBackends.h
[flang][openmp] Check clauses allowed semantic with tablegen generated map
2020-07-11 12:45:12 -04:00
tdtags
…
Types.cpp
…
Types.h
…
WebAssemblyDisassemblerEmitter.cpp
…
WebAssemblyDisassemblerEmitter.h
…
X86DisassemblerShared.h
…
X86DisassemblerTables.cpp
[X86] Remove MODRM_SPLITREGM from the disassembler tables.
2020-07-03 00:16:20 -07:00
X86DisassemblerTables.h
…
X86EVEX2VEXTablesEmitter.cpp
…
X86FoldTablesEmitter.cpp
…
X86ModRMFilters.cpp
[X86-64] Support Intel AMX instructions
2020-07-02 08:57:04 +08:00
X86ModRMFilters.h
[X86-64] Support Intel AMX instructions
2020-07-02 08:57:04 +08:00
X86RecognizableInstr.cpp
[X86] Allow lsl/lar to be parsed with a GR16, GR32, or GR64 as source register.
2020-07-15 23:51:37 -07:00
X86RecognizableInstr.h
[X86-64] Support Intel AMX instructions
2020-07-02 08:57:04 +08:00