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f46c41febb
This patch is to fix lit test case failure relate to alignment, on z/OS, maximum alignment value for 64 bit mode is 16 and also fixed clang/test/Layout/itanium-union-bitfield.cpp, attribute ((aligned(4))) is needed for bit-field member in Union for z/OS because single bit-field has one byte alignment, this will make sure size and alignment will be correct value on z/OS. Differential Revision: https://reviews.llvm.org/D98793
37 lines
974 B
C++
37 lines
974 B
C++
// RUN: %clang_cc1 -emit-llvm-only -triple %itanium_abi_triple -fdump-record-layouts %s 2>/dev/null \
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// RUN: | FileCheck %s
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// On z/OS, a bit-field has single byte alignment. Add aligned(4) on z/OS so the union has
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// the same size & alignment as expected.
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#ifdef __MVS__
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#define ALIGN4 __attribute__((aligned(4)))
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#else
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#define ALIGN4
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#endif
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union A {
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int f1 : 3 ALIGN4;
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A();
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};
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A::A() {}
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union B {
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char f1 : 35 ALIGN4;
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B();
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};
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B::B() {}
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// CHECK:*** Dumping AST Record Layout
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// CHECK-NEXT: 0 | union A
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// CHECK-NEXT: 0:0-2 | int f1
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// CHECK-NEXT: | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)?}}
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// CHECK-NEXT: | nvsize=1, nvalign=4{{(, preferrednvalign=4)?}}]
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// CHECK:*** Dumping AST Record Layout
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// CHECK-NEXT: 0 | union B
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// CHECK-NEXT: 0:0-34 | char f1
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// CHECK-NEXT: | [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)?}}
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// CHECK-NEXT: | nvsize=5, nvalign=4{{(, preferrednvalign=4)?}}]
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