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94473f4db6
Generate nuw GEPs for struct member accesses, as inbounds + non-negative implies nuw. Regression tests are updated using update scripts where possible, and by find + replace where not.
26 lines
1.1 KiB
C
26 lines
1.1 KiB
C
// RUN: %clang_cc1 -triple aarch64_be-linux-gnu -ffreestanding -emit-llvm -O0 -o %t -fdump-record-layouts-simple %s | FileCheck %s --check-prefix=LAYOUT
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// RUN: FileCheck %s --check-prefix=IR <%t
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struct bt3 { signed b2:10; signed b3:10; } b16;
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// Get the high 32-bits and then shift appropriately for big-endian.
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signed callee_b0f(struct bt3 bp11) {
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// IR: callee_b0f(i64 [[ARG:%.*]])
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// IR: [[BP11:%.*]] = alloca %struct.bt3, align 4
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// IR: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw %struct.bt3, ptr [[BP11]], i32 0, i32 0
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// IR: [[COERCE_HIGHBITS:%.*]] = lshr i64 [[ARG]], 32
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// IR: [[COERCE_VAL_II:%.*]] = trunc i64 [[COERCE_HIGHBITS]] to i32
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// IR: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4
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// IR: [[BF_LOAD:%.*]] = load i32, ptr [[BP11]], align 4
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// IR: [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 22
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// IR: ret i32 [[BF_ASHR]]
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return bp11.b2;
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}
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// LAYOUT-LABEL: LLVMType:%struct.bt3 =
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// LAYOUT-SAME: type { i32 }
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// LAYOUT: BitFields:[
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:22 Size:10 IsSigned:1 StorageSize:32 StorageOffset:0
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// LAYOUT-NEXT: <CGBitFieldInfo Offset:12 Size:10 IsSigned:1 StorageSize:32 StorageOffset:0
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// LAYOUT-NEXT: ]>
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