mirror of
https://github.com/llvm/llvm-project.git
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cc426402be
Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783). - Enable abs and neg modifiers for v_cndmask_b32_e64. - Minor corrections and improvements.
31 lines
879 B
ReStructuredText
31 lines
879 B
ReStructuredText
..
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**************************************************
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* *
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* Automatically generated file, do not edit! *
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* *
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**************************************************
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.. _amdgpu_synid_gfx7_tgt:
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tgt
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===
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An export target:
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================== ===================================
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Syntax Description
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================== ===================================
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pos{0..3} Copy vertex position 0..3.
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param{0..31} Copy vertex parameter 0..31.
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mrt{0..7} Copy pixel color to the MRTs 0..7.
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mrtz Copy pixel depth (Z) data.
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null Copy nothing.
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================== ===================================
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Examples:
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.. parsed-literal::
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exp pos3 v1, v2, v3, v4
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exp mrt0 v1, v2, v3, v4
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