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Currently the *tf builtin functions can only be built if long double is an IEEE float, which prevents them from being available e.g. for x86 targets (unlike libgcc which has them). This non-functional change prepares the builtins library *tf functions for being able to target x86 by decoupling their presence from CRT_LDBL_128BIT and instead checking for a CRT_HAS_TF_MODE macro. This change is NFC since the CRT_HAS_TF_MODE is currently only set if long double is an IEEE 128-bit float. Reviewed By: compnerd Differential Revision: https://reviews.llvm.org/D153812
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
//===-- lib/floatunditf.c - uint -> quad-precision conversion -----*- C -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements du_int to quad-precision conversion for the
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// compiler-rt library in the IEEE-754 default round-to-nearest, ties-to-even
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// mode.
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//
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//===----------------------------------------------------------------------===//
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#define QUAD_PRECISION
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#include "fp_lib.h"
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#if defined(CRT_HAS_TF_MODE)
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COMPILER_RT_ABI fp_t __floatunditf(du_int a) {
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const int aWidth = sizeof a * CHAR_BIT;
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// Handle zero as a special case to protect clz
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if (a == 0)
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return fromRep(0);
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// Exponent of (fp_t)a is the width of abs(a).
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const int exponent = (aWidth - 1) - __builtin_clzll(a);
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rep_t result;
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// Shift a into the significand field and clear the implicit bit.
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const int shift = significandBits - exponent;
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result = (rep_t)a << shift ^ implicitBit;
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// Insert the exponent
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result += (rep_t)(exponent + exponentBias) << significandBits;
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return fromRep(result);
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}
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#endif
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