mirror of
https://github.com/llvm/llvm-project.git
synced 2025-05-03 19:46:04 +00:00
60822637bf
This restores commit c7fdd8c11e54585dc9d15d63de9742067e0506b9. Previously reverted in f010b1bef4dda2c7082cbb41dbabf1f149cce306. LLVM function calls carry convergence control tokens as operand bundles, where the tokens themselves are produced by convergence control intrinsics. This patch implements convergence control tokens in MIR as follows: 1. Introduce target-independent ISD opcodes and MIR opcodes for convergence control intrinsics. 2. Model token values as untyped virtual registers in MIR. The change also introduces an additional ISD opcode CONVERGENCECTRL_GLUE and a corresponding machine opcode with the same spelling. This glues the convergence control token to SDNodes that represent calls to intrinsics. The glued token is later translated to an implicit argument in the MIR. The lowering of calls to user-defined functions is target-specific. On AMDGPU, the convergence control operand bundle at a non-intrinsic call is translated to an explicit argument to the SI_CALL_ISEL instruction. Post-selection adjustment converts this explicit argument to an implicit argument on the SI_CALL instruction.
101 lines
3.2 KiB
C++
101 lines
3.2 KiB
C++
//===- MachineConvergenceVerifier.cpp - Verify convergencectrl ------------===//
|
|
//
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "llvm/CodeGen/MachineConvergenceVerifier.h"
|
|
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
|
|
#include "llvm/CodeGen/MachineDominators.h"
|
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
|
#include "llvm/CodeGen/MachineSSAContext.h"
|
|
#include "llvm/IR/GenericConvergenceVerifierImpl.h"
|
|
|
|
using namespace llvm;
|
|
|
|
template <>
|
|
auto GenericConvergenceVerifier<MachineSSAContext>::getConvOp(
|
|
const MachineInstr &MI) -> ConvOpKind {
|
|
switch (MI.getOpcode()) {
|
|
default:
|
|
return CONV_NONE;
|
|
case TargetOpcode::CONVERGENCECTRL_ENTRY:
|
|
return CONV_ENTRY;
|
|
case TargetOpcode::CONVERGENCECTRL_ANCHOR:
|
|
return CONV_ANCHOR;
|
|
case TargetOpcode::CONVERGENCECTRL_LOOP:
|
|
return CONV_LOOP;
|
|
}
|
|
}
|
|
|
|
template <>
|
|
void GenericConvergenceVerifier<
|
|
MachineSSAContext>::checkConvergenceTokenProduced(const MachineInstr &MI) {
|
|
Check(!MI.hasImplicitDef(),
|
|
"Convergence control tokens are defined explicitly.",
|
|
{Context.print(&MI)});
|
|
const MachineOperand &Def = MI.getOperand(0);
|
|
const MachineRegisterInfo &MRI = Context.getFunction()->getRegInfo();
|
|
Check(MRI.getUniqueVRegDef(Def.getReg()),
|
|
"Convergence control tokens must have unique definitions.",
|
|
{Context.print(&MI)});
|
|
}
|
|
|
|
template <>
|
|
const MachineInstr *
|
|
GenericConvergenceVerifier<MachineSSAContext>::findAndCheckConvergenceTokenUsed(
|
|
const MachineInstr &MI) {
|
|
const MachineRegisterInfo &MRI = Context.getFunction()->getRegInfo();
|
|
const MachineInstr *TokenDef = nullptr;
|
|
|
|
for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) {
|
|
const MachineOperand &MO = MI.getOperand(I);
|
|
if (!MO.isReg() || !MO.isUse())
|
|
continue;
|
|
Register OpReg = MO.getReg();
|
|
if (!OpReg.isVirtual())
|
|
continue;
|
|
|
|
const MachineInstr *Def = MRI.getUniqueVRegDef(OpReg);
|
|
if (!Def)
|
|
continue;
|
|
if (getConvOp(*Def) == CONV_NONE)
|
|
continue;
|
|
|
|
CheckOrNull(
|
|
MI.isConvergent(),
|
|
"Convergence control tokens can only be used by convergent operations.",
|
|
{Context.print(OpReg), Context.print(&MI)});
|
|
|
|
CheckOrNull(!TokenDef,
|
|
"An operation can use at most one convergence control token.",
|
|
{Context.print(OpReg), Context.print(&MI)});
|
|
|
|
TokenDef = Def;
|
|
}
|
|
|
|
if (TokenDef)
|
|
Tokens[&MI] = TokenDef;
|
|
|
|
return TokenDef;
|
|
}
|
|
|
|
template <>
|
|
bool GenericConvergenceVerifier<MachineSSAContext>::isInsideConvergentFunction(
|
|
const MachineInstr &MI) {
|
|
// The class MachineFunction does not have any property to indicate whether it
|
|
// is convergent. Trivially return true so that the check always passes.
|
|
return true;
|
|
}
|
|
|
|
template <>
|
|
bool GenericConvergenceVerifier<MachineSSAContext>::isConvergent(
|
|
const MachineInstr &MI) {
|
|
return MI.isConvergent();
|
|
}
|
|
|
|
template class llvm::GenericConvergenceVerifier<MachineSSAContext>;
|