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mirror of https://github.com/llvm/llvm-project.git synced 2025-04-27 09:26:05 +00:00
Ulrich Weigand 80267f8148
Support z17 processor name and scheduler description ()
The recently announced IBM z17 processor implements the architecture
already supported as "arch15" in LLVM. This patch adds support for "z17"
as an alternate architecture name for arch15.

This patch also add the scheduler description for the z17 processor,
provided by Jonas Paulsson.
2025-04-11 00:20:58 +02:00

18 lines
546 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; Test 128-bit absolute value in vector registers on z17
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s
define i128 @f1(i128 %src) {
; CHECK-LABEL: f1:
; CHECK: # %bb.0:
; CHECK-NEXT: vl %v0, 0(%r3), 3
; CHECK-NEXT: vlpq %v0, %v0
; CHECK-NEXT: vst %v0, 0(%r2), 3
; CHECK-NEXT: br %r14
%cmp = icmp slt i128 %src, 0
%neg = sub i128 0, %src
%res = select i1 %cmp, i128 %neg, i128 %src
ret i128 %res
}