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80267f8148
The recently announced IBM z17 processor implements the architecture already supported as "arch15" in LLVM. This patch adds support for "z17" as an alternate architecture name for arch15. This patch also add the scheduler description for the z17 processor, provided by Jonas Paulsson.
415 lines
10 KiB
LLVM
415 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; Test 128-bit arithmetic in vector registers on z17
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z17 | FileCheck %s
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; Sign extension from i64.
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define i128 @f1(i64 %a) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlvgp %v0, %r3, %r3
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; CHECK-NEXT: vuplg %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = sext i64 %a to i128
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ret i128 %res
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}
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; Sign extension from i64 from memory.
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define i128 @f2(ptr %ptr) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlrepg %v0, 0(%r3)
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; CHECK-NEXT: vrepib %v1, 64
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; CHECK-NEXT: vsrab %v0, %v0, %v1
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i64, ptr %ptr
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%res = sext i64 %a to i128
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ret i128 %res
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}
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; Zero extension from i64.
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define i128 @f3(i64 %a) {
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; CHECK-LABEL: f3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vlvgg %v0, %r3, 1
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = zext i64 %a to i128
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ret i128 %res
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}
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; Zero extension from i64 from memory.
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define i128 @f4(ptr %ptr) {
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; CHECK-LABEL: f4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vleg %v0, 0(%r3), 1
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i64, ptr %ptr
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%res = zext i64 %a to i128
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ret i128 %res
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}
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; Truncation to i64.
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define i64 @f5(i128 %a) {
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; CHECK-LABEL: f5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r2), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vlgvg %r2, %v0, 1
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i64
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ret i64 %res
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}
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; Truncation to i64 in memory.
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define void @f6(ptr %ptr, i128 %a) {
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; CHECK-LABEL: f6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vsteg %v0, 0(%r2), 1
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i64
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store i64 %res, ptr %ptr
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ret void
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}
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; Sign extension from i32.
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define i128 @f7(i32 %a) {
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; CHECK-LABEL: f7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lgfr %r0, %r3
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; CHECK-NEXT: vlvgp %v0, %r0, %r0
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; CHECK-NEXT: vuplg %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = sext i32 %a to i128
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ret i128 %res
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}
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; Sign extension from i32 from memory.
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define i128 @f8(ptr %ptr) {
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; CHECK-LABEL: f8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlrepf %v0, 0(%r3)
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; CHECK-NEXT: vrepib %v1, 96
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; CHECK-NEXT: vsrab %v0, %v0, %v1
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i32, ptr %ptr
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%res = sext i32 %a to i128
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ret i128 %res
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}
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; Zero extension from i32.
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define i128 @f9(i32 %a) {
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; CHECK-LABEL: f9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vlvgf %v0, %r3, 3
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = zext i32 %a to i128
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ret i128 %res
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}
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; Zero extension from i32 from memory.
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define i128 @f10(ptr %ptr) {
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; CHECK-LABEL: f10:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vlef %v0, 0(%r3), 3
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i32, ptr %ptr
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%res = zext i32 %a to i128
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ret i128 %res
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}
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; Truncation to i32.
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define i32 @f11(i128 %a) {
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; CHECK-LABEL: f11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r2), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vlgvf %r2, %v0, 3
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; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i32
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ret i32 %res
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}
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; Truncation to i32 in memory.
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define void @f12(ptr %ptr, i128 %a) {
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; CHECK-LABEL: f12:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vstef %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i32
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store i32 %res, ptr %ptr
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ret void
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}
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; Sign extension from i16.
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define i128 @f13(i16 %a) {
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; CHECK-LABEL: f13:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3l killed $r3l def $r3d
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; CHECK-NEXT: lghr %r0, %r3
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; CHECK-NEXT: vlvgp %v0, %r0, %r0
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; CHECK-NEXT: vuplg %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = sext i16 %a to i128
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ret i128 %res
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}
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; Sign extension from i16 from memory.
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define i128 @f14(ptr %ptr) {
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; CHECK-LABEL: f14:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlreph %v0, 0(%r3)
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; CHECK-NEXT: vrepib %v1, 112
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; CHECK-NEXT: vsrab %v0, %v0, %v1
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i16, ptr %ptr
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%res = sext i16 %a to i128
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ret i128 %res
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}
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; Zero extension from i16.
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define i128 @f15(i16 %a) {
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; CHECK-LABEL: f15:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vlvgh %v0, %r3, 7
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = zext i16 %a to i128
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ret i128 %res
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}
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; Zero extension from i16 from memory.
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define i128 @f16(ptr %ptr) {
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; CHECK-LABEL: f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vleh %v0, 0(%r3), 7
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i16, ptr %ptr
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%res = zext i16 %a to i128
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ret i128 %res
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}
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; Truncation to i16.
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define i16 @f17(i128 %a) {
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; CHECK-LABEL: f17:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r2), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vlgvf %r2, %v0, 3
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; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i16
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ret i16 %res
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}
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; Truncation to i16 in memory.
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define void @f18(ptr %ptr, i128 %a) {
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; CHECK-LABEL: f18:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vsteh %v0, 0(%r2), 7
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i16
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store i16 %res, ptr %ptr
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ret void
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}
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; Sign extension from i8.
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define i128 @f19(i8 %a) {
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; CHECK-LABEL: f19:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $r3l killed $r3l def $r3d
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; CHECK-NEXT: lgbr %r0, %r3
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; CHECK-NEXT: vlvgp %v0, %r0, %r0
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; CHECK-NEXT: vuplg %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = sext i8 %a to i128
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ret i128 %res
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}
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; Sign extension from i8 from memory.
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define i128 @f20(ptr %ptr) {
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; CHECK-LABEL: f20:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vlrepb %v0, 0(%r3)
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; CHECK-NEXT: vrepib %v1, 120
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; CHECK-NEXT: vsrab %v0, %v0, %v1
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i8, ptr %ptr
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%res = sext i8 %a to i128
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ret i128 %res
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}
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; Zero extension from i8.
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define i128 @f21(i8 %a) {
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; CHECK-LABEL: f21:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vlvgb %v0, %r3, 15
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = zext i8 %a to i128
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ret i128 %res
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}
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; Zero extension from i8 from memory.
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define i128 @f22(ptr %ptr) {
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; CHECK-LABEL: f22:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vleb %v0, 0(%r3), 15
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i8, ptr %ptr
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%res = zext i8 %a to i128
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ret i128 %res
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}
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; Truncation to i8.
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define i8 @f23(i128 %a) {
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; CHECK-LABEL: f23:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r2), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vlgvf %r2, %v0, 3
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; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i8
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ret i8 %res
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}
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; Truncation to i8 in memory.
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define void @f24(ptr %ptr, i128 %a) {
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; CHECK-LABEL: f24:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vsteb %v0, 0(%r2), 15
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i8
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store i8 %res, ptr %ptr
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ret void
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}
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; Sign extension from i1.
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define i128 @f25(i1 %a) {
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; CHECK-LABEL: f25:
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; CHECK: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI24_0
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; CHECK-NEXT: vl %v1, 0(%r1), 3
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; CHECK-NEXT: vlvgp %v0, %r3, %r3
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; CHECK-NEXT: vn %v0, %v0, %v1
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; CHECK-NEXT: vlcq %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = sext i1 %a to i128
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ret i128 %res
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}
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; Sign extension from i1 from memory.
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define i128 @f26(ptr %ptr) {
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; CHECK-LABEL: f26:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vleb %v0, 0(%r3), 15
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; CHECK-NEXT: larl %r1, .LCPI25_0
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; CHECK-NEXT: vl %v1, 0(%r1), 3
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; CHECK-NEXT: vn %v0, %v0, %v1
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; CHECK-NEXT: vlcq %v0, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i1, ptr %ptr
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%res = sext i1 %a to i128
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ret i128 %res
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}
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; Zero extension from i1.
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define i128 @f27(i1 %a) {
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; CHECK-LABEL: f27:
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; CHECK: # %bb.0:
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; CHECK-NEXT: larl %r1, .LCPI26_0
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; CHECK-NEXT: vl %v1, 0(%r1), 3
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; CHECK-NEXT: vlvgp %v0, %r3, %r3
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; CHECK-NEXT: vn %v0, %v0, %v1
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%res = zext i1 %a to i128
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ret i128 %res
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}
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; Zero extension from i1 from memory.
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define i128 @f28(ptr %ptr) {
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; CHECK-LABEL: f28:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vgbm %v0, 0
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; CHECK-NEXT: vleb %v0, 0(%r3), 15
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%a = load i1, ptr %ptr
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%res = zext i1 %a to i128
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ret i128 %res
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}
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; Truncation to i1.
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define i1 @f29(i128 %a) {
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; CHECK-LABEL: f29:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r2), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vlgvf %r2, %v0, 3
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; CHECK-NEXT: # kill: def $r2l killed $r2l killed $r2d
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i1
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ret i1 %res
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}
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; Truncation to i1 in memory.
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define void @f30(ptr %ptr, i128 %a) {
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; CHECK-LABEL: f30:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: larl %r1, .LCPI29_0
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; CHECK-NEXT: vl %v1, 0(%r1), 3
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; CHECK-NEXT: vaq %v0, %v0, %v0
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; CHECK-NEXT: vn %v0, %v0, %v1
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; CHECK-NEXT: vsteb %v0, 0(%r2), 15
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; CHECK-NEXT: br %r14
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%op = add i128 %a, %a
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%res = trunc i128 %op to i1
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store i1 %res, ptr %ptr
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ret void
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}
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