llvm-project/clang/test/CodeGenCXX/member-functions.cpp
Chris Lattner 8a2f3c778e fix PR5179 and correctly fix PR5831 to not miscompile.
The X86-64 ABI code didn't handle the case when a struct
would get classified and turn up as "NoClass INTEGER" for
example.  This is perfectly possible when the first slot
is all padding (e.g. due to empty base classes).  In this
situation, the first 8-byte doesn't take a register at all,
only the second 8-byte does.

This fixes this by enhancing the x86-64 abi stuff to allow
and handle this case, reverts the broken fix for PR5831,
and enhances the target independent stuff to be able to 
handle an argument value in registers being accessed at an
offset from the memory value.

This is the last x86-64 calling convention related miscompile
that I'm aware of.

llvm-svn: 109848
2010-07-30 04:02:24 +00:00

64 lines
1.1 KiB
C++

// RUN: %clang_cc1 -emit-llvm %s -triple x86_64-apple-darwin9 -o %t
struct C {
void f();
void g(int, ...);
};
// RUN: grep "define void @_ZN1C1fEv" %t | count 1
void C::f() {
}
void test1() {
C c;
// RUN: grep "call void @_ZN1C1fEv" %t | count 1
c.f();
// RUN: grep "call void (.struct.C\*, i32, ...)\* @_ZN1C1gEiz" %t | count 1
c.g(1, 2, 3);
}
struct S {
// RUN: grep "define linkonce_odr void @_ZN1SC1Ev" %t
inline S() { }
// RUN: grep "define linkonce_odr void @_ZN1SC1Ev" %t
inline ~S() { }
// RUN: grep "define linkonce_odr void @_ZN1S9f_inline1Ev" %t
void f_inline1() { }
// RUN: grep "define linkonce_odr void @_ZN1S9f_inline2Ev" %t
inline void f_inline2() { }
// RUN: grep "define linkonce_odr void @_ZN1S1gEv" %t
static void g() { }
static void f();
};
// RUN: grep "define void @_ZN1S1fEv" %t
void S::f() {
}
void test2() {
S s;
s.f_inline1();
s.f_inline2();
S::g();
}
struct T {
T operator+(const T&);
};
void test3() {
T t1, t2;
// RUN: grep "call void @_ZN1TplERKS_" %t
T result = t1 + t2;
}