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This patch aims to reduce spilling and register moves by using the 3-address versions of instructions per default instead of the 2-address equivalent ones. It seems that both spilling and register moves are improved noticeably generally. Regalloc hints are passed to increase conversions to 2-address instructions which are done in SystemZShortenInst.cpp (after regalloc). Since the SystemZ reg/mem instructions are 2-address (dst and lhs regs are the same), foldMemoryOperandImpl() can no longer trivially fold a spilled source register since the reg/reg instruction is now 3-address. In order to remedy this, new 3-address pseudo memory instructions are used to perform the folding only when the dst and lhs virtual registers are known to be allocated to the same physreg. In order to not let MachineCopyPropagation run and change registers on these transformed instructions (making it 3-address), a new target pass called SystemZPostRewrite.cpp is run just after VirtRegRewriter, that immediately lowers the pseudo to a target instruction. If it would have been possibe to insert a COPY instruction and change a register operand (convert to 2-address) in foldMemoryOperandImpl() while trusting that the caller (e.g. InlineSpiller) would update/repair the involved LiveIntervals, the solution involving pseudo instructions would not have been needed. This is perhaps a potential improvement (see Phabricator post). Common code changes: * A new hook TargetPassConfig::addPostRewrite() is utilized to be able to run a target pass immediately before MachineCopyPropagation. * VirtRegMap is passed as an argument to foldMemoryOperand(). Review: Ulrich Weigand, Quentin Colombet https://reviews.llvm.org/D60888 llvm-svn: 362868
125 lines
3.9 KiB
C++
125 lines
3.9 KiB
C++
//==---- SystemZPostRewrite.cpp - Select pseudos after RegAlloc ---*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a pass that is run immediately after VirtRegRewriter
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// but before MachineCopyPropagation. The purpose is to lower pseudos to
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// target instructions before any later pass might substitute a register for
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// another.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZ.h"
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#include "SystemZInstrInfo.h"
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#include "SystemZSubtarget.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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using namespace llvm;
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#define SYSTEMZ_POSTREWRITE_NAME "SystemZ Post Rewrite pass"
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#define DEBUG_TYPE "systemz-postrewrite"
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STATISTIC(MemFoldCopies, "Number of copies inserted before folded mem ops.");
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namespace llvm {
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void initializeSystemZPostRewritePass(PassRegistry&);
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}
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namespace {
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class SystemZPostRewrite : public MachineFunctionPass {
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public:
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static char ID;
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SystemZPostRewrite() : MachineFunctionPass(ID) {
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initializeSystemZPostRewritePass(*PassRegistry::getPassRegistry());
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}
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const SystemZInstrInfo *TII;
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bool runOnMachineFunction(MachineFunction &Fn) override;
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StringRef getPassName() const override { return SYSTEMZ_POSTREWRITE_NAME; }
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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bool selectMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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MachineBasicBlock::iterator &NextMBBI);
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bool selectMBB(MachineBasicBlock &MBB);
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};
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char SystemZPostRewrite::ID = 0;
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} // end anonymous namespace
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INITIALIZE_PASS(SystemZPostRewrite, "systemz-post-rewrite",
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SYSTEMZ_POSTREWRITE_NAME, false, false)
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/// Returns an instance of the Post Rewrite pass.
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FunctionPass *llvm::createSystemZPostRewritePass(SystemZTargetMachine &TM) {
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return new SystemZPostRewrite();
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}
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/// If MBBI references a pseudo instruction that should be selected here,
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/// do it and return true. Otherwise return false.
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bool SystemZPostRewrite::selectMI(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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MachineBasicBlock::iterator &NextMBBI) {
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MachineInstr &MI = *MBBI;
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unsigned Opcode = MI.getOpcode();
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// Note: If this could be done during regalloc in foldMemoryOperandImpl()
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// while also updating the LiveIntervals, there would be no need for the
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// MemFoldPseudo to begin with.
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int TargetMemOpcode = SystemZ::getTargetMemOpcode(Opcode);
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if (TargetMemOpcode != -1) {
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MI.setDesc(TII->get(TargetMemOpcode));
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MI.tieOperands(0, 1);
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unsigned DstReg = MI.getOperand(0).getReg();
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MachineOperand &SrcMO = MI.getOperand(1);
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if (DstReg != SrcMO.getReg()) {
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BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(SystemZ::COPY), DstReg)
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.addReg(SrcMO.getReg());
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SrcMO.setReg(DstReg);
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MemFoldCopies++;
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}
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return true;
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}
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return false;
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}
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/// Iterate over the instructions in basic block MBB and select any
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/// pseudo instructions. Return true if anything was modified.
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bool SystemZPostRewrite::selectMBB(MachineBasicBlock &MBB) {
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bool Modified = false;
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MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
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while (MBBI != E) {
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MachineBasicBlock::iterator NMBBI = std::next(MBBI);
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Modified |= selectMI(MBB, MBBI, NMBBI);
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MBBI = NMBBI;
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}
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return Modified;
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}
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bool SystemZPostRewrite::runOnMachineFunction(MachineFunction &MF) {
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TII = static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
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bool Modified = false;
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for (auto &MBB : MF)
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Modified |= selectMBB(MBB);
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return Modified;
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}
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