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llvm-project/llvm/lib/CodeGen/SelectionDAG
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Sanjay Patel a253a2a793 [SDAG] fold fsub -0.0, undef to undef rather than NaN 
A question about this behavior came up on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2020-February/139003.html
...and as part of backend improvements in D73978.

We decided not to implement a more general change that would have
folded any FP binop with nearly arbitrary constant + undef operand
to undef because that is not theoretically correct (even if it is
practically correct).

This is the SDAG-equivalent to the IR change in D74713.
2020-02-23 11:36:53 -05:00
..
CMakeLists.txt
[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"
2019-11-21 10:48:08 -08:00
DAGCombiner.cpp
[llvm][CodeGen] DAG Combiner folds for vscale.
2020-02-21 18:03:12 +00:00
FastISel.cpp
Add dbgs() output to help track down missing DW_AT_location bugs, NFC
2020-02-13 14:38:44 -08:00
FunctionLoweringInfo.cpp
[KnownBits] Introduce anyext instead of passing a flag into zext
2020-02-12 19:06:53 +00:00
InstrEmitter.cpp
Reland "[WebAssembly][InstrEmitter] Foundation for multivalue call lowering"
2020-02-18 13:49:46 -08:00
InstrEmitter.h
…
LegalizeDAG.cpp
[X86][LegalizeTypes] Add SoftPromoteHalf support STRICT_FP_EXTEND and STRICT_FP_ROUND
2020-02-11 22:30:04 -08:00
LegalizeFloatTypes.cpp
[X86][LegalizeTypes] Add SoftPromoteHalf support STRICT_FP_EXTEND and STRICT_FP_ROUND
2020-02-11 22:30:04 -08:00
LegalizeIntegerTypes.cpp
[AArch64][FPenv] Update chain of int to fp conversion
2020-02-15 05:07:34 +00:00
LegalizeTypes.cpp
[LegalizeTypes][ARM][AArch64][PowerPC][RISCV][X86] Use BUILD_PAIR to return expanded integer results from ReplaceNodeResults instead of just returning two results.
2020-02-08 09:52:31 -08:00
LegalizeTypes.h
[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.
2020-02-01 11:21:04 -08:00
LegalizeTypesGeneric.cpp
[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.
2020-02-01 11:21:04 -08:00
LegalizeVectorOps.cpp
[FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_INSTRUCTION,
2020-01-27 10:38:05 +08:00
LegalizeVectorTypes.cpp
[NFC] Silence compiler warning [-Wmissing-braces].
2020-02-18 10:37:12 -08:00
LLVMBuild.txt
…
ResourcePriorityQueue.cpp
…
ScheduleDAGFast.cpp
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
2019-08-01 23:27:28 +00:00
ScheduleDAGRRList.cpp
[ScheduleDAG] When a node is cloned, add an edge between the nodes.
2019-10-04 19:51:40 +00:00
ScheduleDAGSDNodes.cpp
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
ScheduleDAGSDNodes.h
Prune Analysis includes from SelectionDAG.h
2019-10-19 01:07:48 +00:00
ScheduleDAGVLIW.cpp
Prune Analysis includes from SelectionDAG.h
2019-10-19 01:07:48 +00:00
SDNodeDbgValue.h
…
SelectionDAG.cpp
[SDAG] fold fsub -0.0, undef to undef rather than NaN
2020-02-23 11:36:53 -05:00
SelectionDAGAddressAnalysis.cpp
Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
2019-10-19 01:31:09 +00:00
SelectionDAGBuilder.cpp
[SVE] Add support for lowering GEPs involving scalable vectors.
2020-02-20 13:45:41 -08:00
SelectionDAGBuilder.h
[FPEnv] Fix chain handling regression after 04a8696
2020-01-14 14:10:57 +01:00
SelectionDAGDumper.cpp
[X86][LegalizeTypes] Add SoftPromoteHalf support STRICT_FP_EXTEND and STRICT_FP_ROUND
2020-02-11 22:30:04 -08:00
SelectionDAGISel.cpp
Add dbgs() output to help track down missing DW_AT_location bugs, NFC
2020-02-13 14:38:44 -08:00
SelectionDAGPrinter.cpp
Make llvm::StringRef to std::string conversions explicit.
2020-01-28 23:25:25 +01:00
SelectionDAGTargetInfo.cpp
…
StatepointLowering.cpp
[Statepoint] Remove redundant clear of call target on register
2020-02-13 10:25:50 +07:00
StatepointLowering.h
…
TargetLowering.cpp
[TargetLowering] Apply basic shift combines before recursive SimplifyDemandedBits calls.
2020-02-21 16:31:20 +00:00