Nadav Rotem a2e7ea2f18 A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases ...

because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;

llvm-svn: 164885

2012-09-29 06:33:25 +00:00

..

CMakeLists.txt

llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.

2012-06-24 13:32:01 +00:00

DAGCombiner.cpp

A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases

2012-09-29 06:33:25 +00:00

FastISel.cpp

Try to reduce the compile time impact of r161232.

2012-08-03 21:26:24 +00:00

FunctionLoweringInfo.cpp

Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be

2012-09-06 09:17:37 +00:00

InstrEmitter.cpp

Fix PR11985

2012-09-12 21:43:09 +00:00

InstrEmitter.h

Allow trailing physreg RegisterSDNode operands on non-variadic instructions.

2012-07-04 23:53:23 +00:00

LegalizeDAG.cpp

Fix some funky indentation.

2012-09-18 01:34:40 +00:00

LegalizeFloatTypes.cpp

Convert assert(0) to llvm_unreachable

2012-02-05 08:31:47 +00:00

LegalizeIntegerTypes.cpp

Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767

2012-09-27 10:14:43 +00:00

LegalizeTypes.cpp

Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall

2012-05-25 16:35:28 +00:00

LegalizeTypes.h

Add support for FMA to WidenVectorResult.

2012-08-30 07:13:41 +00:00

LegalizeTypesGeneric.cpp

Fix PR13859

2012-09-17 18:05:20 +00:00

LegalizeVectorOps.cpp

Fix a typo.

2012-09-02 12:21:50 +00:00

LegalizeVectorTypes.cpp

Add support for FMA to WidenVectorResult.

2012-08-30 07:13:41 +00:00

LLVMBuild.txt

LLVMBuild: Remove trailing newline, which irked me.

2011-12-12 19:48:00 +00:00

Makefile

…

ResourcePriorityQueue.cpp

I'm introducing a new machine model to simultaneously allow simple

2012-07-07 04:00:00 +00:00

ScheduleDAGFast.cpp

Simplify some more getAliasSet callers.

2012-06-01 22:38:17 +00:00

ScheduleDAGRRList.cpp

Release build: guard dump functions with

2012-09-11 22:23:19 +00:00

ScheduleDAGSDNodes.cpp

Release build: guard dump functions with

2012-09-11 22:23:19 +00:00

ScheduleDAGSDNodes.h

Add SelectionDAG::getTargetIndex.

2012-08-07 22:37:05 +00:00

ScheduleDAGVLIW.cpp

misched preparation: rename core scheduler methods for consistency.

2012-03-07 23:00:49 +00:00

SDNodeDbgValue.h

…

SDNodeOrdering.h

Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.

2012-09-18 02:01:41 +00:00

SelectionDAG.cpp

Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767

2012-09-27 10:14:43 +00:00

SelectionDAGBuilder.cpp

Remove the `hasFnAttr' method from Function.

2012-09-26 21:48:26 +00:00

SelectionDAGBuilder.h

BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle

2012-08-24 18:14:27 +00:00

SelectionDAGDumper.cpp

Fix PR11985

2012-09-12 21:43:09 +00:00

SelectionDAGISel.cpp

Fix bad comment. No functional change.

2012-09-16 16:48:25 +00:00

SelectionDAGPrinter.cpp

Constify SDNodeIterator an stop its only non-const user being cast stripped

2012-09-05 22:03:34 +00:00

TargetLowering.cpp

Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767

2012-09-27 10:14:43 +00:00

TargetSelectionDAGInfo.cpp

…