Shilei Tian a45b133d40

[AMDGPU][Verifier] Mark calls to entry functions as invalid in the IR verifier (#134910)

2025-04-11 15:32:37 -04:00

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AArch64

[AArch64] Regenerate fsh.ll test. NFC

2025-04-11 16:37:42 +01:00

AMDGPU

[AMDGPU][Verifier] Mark calls to entry functions as invalid in the IR verifier (#134910)

2025-04-11 15:32:37 -04:00

ARC

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ARM

AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function; use lowerDSOLocalEquivalent in more cases

2025-04-08 10:11:20 -07:00

AVR

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BPF

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CSKY

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DirectX

[DirectX] legalize usub.sat (#135288)

2025-04-11 14:32:44 -04:00

Generic

[DebugInfo][RemoveDIs] Remove debug-intrinsic printing cmdline options (#131855)

2025-04-01 14:27:11 +01:00

Hexagon

[llvm][Hexagon] Promote operand v2i1 to v2i32 (#135409)

2025-04-11 14:25:50 -05:00

Inputs

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Lanai

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LoongArch

[LoongArch] lower vector shuffle to shift if possible (#132866)

2025-04-10 15:26:00 +08:00

M68k

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Mips

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MIR

[Verifier] Require that dbg.declare variable is a ptr (#134355)

2025-04-04 15:34:45 +02:00

MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Improve NVVMReflect Efficiency (#134416)

2025-04-10 18:33:37 -07:00

PowerPC

Add 'REQUIRES: asserts' to test undef-args.ll added in #135247 to skip test when asserts are not present.

2025-04-11 02:18:10 +00:00

RISCV

[DAGCombiner] Fold subtraction if above a constant threshold to umin (#135194)

2025-04-11 15:00:40 +02:00

SPARC

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SPIRV

[SPIR-V] Don't emit OpLifetime for Vulkan (#135166)

2025-04-11 11:11:59 +02:00

SystemZ

Support z17 processor name and scheduler description (#135254)

2025-04-11 00:20:58 +02:00

Thumb

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Thumb2

Revert "[ARM][ConstantIslands] Correct MinNoSplitDisp calculation (#114590)"

2025-04-10 13:56:52 -07:00

VE

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WebAssembly

[SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitcast. (#133717)

2025-04-03 11:14:08 +01:00

WinCFGuard

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WinEH

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X86

[X86] combineConcatVectorOps - require free concatenation of at least one operand of UNPCKL\H (#135366)

2025-04-11 15:41:09 +01:00

XCore

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Xtensa

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