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The original change was pushed in main as commit f7a23ecece52. It was then reverted by commit a04f01bab2 because it caused linker failures on buildbots that don't build the AMDGPU target. -- Some instructions are not defined well enough within the target’s scheduling model for llvm-mca to be able to properly simulate its behaviour. The ideal solution to this situation is to modify the scheduling model, but that’s not always a viable strategy. Maybe other parts of the backend depend on that instruction being modelled the way that it is. Or maybe the instruction is quite complex and it’s difficult to fully capture its behaviour with tablegen. The CustomBehaviour class (which I will refer to as CB frequently) is designed to provide intuitive scaffolding for developers to implement the correct modelling for these instructions. More details are available in the original commit log message (f7a23ecece52). Differential Revision: https://reviews.llvm.org/D104149
671 lines
24 KiB
C++
671 lines
24 KiB
C++
//===-- llvm-mca.cpp - Machine Code Analyzer -------------------*- C++ -* -===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This utility is a simple driver that allows static performance analysis on
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// machine code similarly to how IACA (Intel Architecture Code Analyzer) works.
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//
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// llvm-mca [options] <file-name>
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// -march <type>
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// -mcpu <cpu>
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// -o <file>
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//
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// The target defaults to the host target.
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// The cpu defaults to the 'native' host cpu.
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// The output defaults to standard output.
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//
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//===----------------------------------------------------------------------===//
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#include "CodeRegion.h"
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#include "CodeRegionGenerator.h"
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#include "PipelinePrinter.h"
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#include "Views/BottleneckAnalysis.h"
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#include "Views/DispatchStatistics.h"
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#include "Views/InstructionInfoView.h"
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#include "Views/RegisterFileStatistics.h"
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#include "Views/ResourcePressureView.h"
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#include "Views/RetireControlUnitStatistics.h"
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#include "Views/SchedulerStatistics.h"
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#include "Views/SummaryView.h"
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#include "Views/TimelineView.h"
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#ifdef HAS_AMDGPU
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#include "lib/AMDGPU/AMDGPUCustomBehaviour.h"
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#endif
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCTargetOptionsCommandFlags.h"
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#include "llvm/MCA/CodeEmitter.h"
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#include "llvm/MCA/Context.h"
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#include "llvm/MCA/CustomBehaviour.h"
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#include "llvm/MCA/InstrBuilder.h"
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#include "llvm/MCA/Pipeline.h"
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#include "llvm/MCA/Stages/EntryStage.h"
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#include "llvm/MCA/Stages/InstructionTables.h"
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#include "llvm/MCA/Support.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/ErrorOr.h"
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#include "llvm/Support/FileSystem.h"
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#include "llvm/Support/Host.h"
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#include "llvm/Support/InitLLVM.h"
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#include "llvm/Support/MemoryBuffer.h"
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#include "llvm/Support/SourceMgr.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "llvm/Support/ToolOutputFile.h"
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#include "llvm/Support/WithColor.h"
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using namespace llvm;
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static mc::RegisterMCTargetOptionsFlags MOF;
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static cl::OptionCategory ToolOptions("Tool Options");
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static cl::OptionCategory ViewOptions("View Options");
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static cl::opt<std::string> InputFilename(cl::Positional,
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cl::desc("<input file>"),
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cl::cat(ToolOptions), cl::init("-"));
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static cl::opt<std::string> OutputFilename("o", cl::desc("Output filename"),
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cl::init("-"), cl::cat(ToolOptions),
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cl::value_desc("filename"));
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static cl::opt<std::string>
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ArchName("march",
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cl::desc("Target architecture. "
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"See -version for available targets"),
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cl::cat(ToolOptions));
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static cl::opt<std::string>
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TripleName("mtriple",
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cl::desc("Target triple. See -version for available targets"),
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cl::cat(ToolOptions));
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static cl::opt<std::string>
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MCPU("mcpu",
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cl::desc("Target a specific cpu type (-mcpu=help for details)"),
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cl::value_desc("cpu-name"), cl::cat(ToolOptions), cl::init("native"));
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static cl::opt<std::string>
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MATTR("mattr",
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cl::desc("Additional target features."),
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cl::cat(ToolOptions));
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static cl::opt<bool>
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PrintJson("json",
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cl::desc("Print the output in json format"),
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cl::cat(ToolOptions), cl::init(false));
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static cl::opt<int>
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OutputAsmVariant("output-asm-variant",
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cl::desc("Syntax variant to use for output printing"),
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cl::cat(ToolOptions), cl::init(-1));
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static cl::opt<bool>
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PrintImmHex("print-imm-hex", cl::cat(ToolOptions), cl::init(false),
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cl::desc("Prefer hex format when printing immediate values"));
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static cl::opt<unsigned> Iterations("iterations",
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cl::desc("Number of iterations to run"),
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cl::cat(ToolOptions), cl::init(0));
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static cl::opt<unsigned>
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DispatchWidth("dispatch", cl::desc("Override the processor dispatch width"),
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cl::cat(ToolOptions), cl::init(0));
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static cl::opt<unsigned>
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RegisterFileSize("register-file-size",
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cl::desc("Maximum number of physical registers which can "
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"be used for register mappings"),
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cl::cat(ToolOptions), cl::init(0));
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static cl::opt<unsigned>
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MicroOpQueue("micro-op-queue-size", cl::Hidden,
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cl::desc("Number of entries in the micro-op queue"),
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cl::cat(ToolOptions), cl::init(0));
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static cl::opt<unsigned>
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DecoderThroughput("decoder-throughput", cl::Hidden,
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cl::desc("Maximum throughput from the decoders "
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"(instructions per cycle)"),
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cl::cat(ToolOptions), cl::init(0));
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static cl::opt<bool>
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PrintRegisterFileStats("register-file-stats",
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cl::desc("Print register file statistics"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool> PrintDispatchStats("dispatch-stats",
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cl::desc("Print dispatch statistics"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool>
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PrintSummaryView("summary-view", cl::Hidden,
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cl::desc("Print summary view (enabled by default)"),
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cl::cat(ViewOptions), cl::init(true));
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static cl::opt<bool> PrintSchedulerStats("scheduler-stats",
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cl::desc("Print scheduler statistics"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool>
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PrintRetireStats("retire-stats",
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cl::desc("Print retire control unit statistics"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool> PrintResourcePressureView(
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"resource-pressure",
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cl::desc("Print the resource pressure view (enabled by default)"),
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cl::cat(ViewOptions), cl::init(true));
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static cl::opt<bool> PrintTimelineView("timeline",
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cl::desc("Print the timeline view"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<unsigned> TimelineMaxIterations(
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"timeline-max-iterations",
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cl::desc("Maximum number of iterations to print in timeline view"),
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cl::cat(ViewOptions), cl::init(0));
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static cl::opt<unsigned> TimelineMaxCycles(
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"timeline-max-cycles",
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cl::desc(
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"Maximum number of cycles in the timeline view. Defaults to 80 cycles"),
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cl::cat(ViewOptions), cl::init(80));
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static cl::opt<bool>
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AssumeNoAlias("noalias",
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cl::desc("If set, assume that loads and stores do not alias"),
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cl::cat(ToolOptions), cl::init(true));
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static cl::opt<unsigned> LoadQueueSize("lqueue",
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cl::desc("Size of the load queue"),
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cl::cat(ToolOptions), cl::init(0));
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static cl::opt<unsigned> StoreQueueSize("squeue",
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cl::desc("Size of the store queue"),
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cl::cat(ToolOptions), cl::init(0));
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static cl::opt<bool>
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PrintInstructionTables("instruction-tables",
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cl::desc("Print instruction tables"),
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cl::cat(ToolOptions), cl::init(false));
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static cl::opt<bool> PrintInstructionInfoView(
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"instruction-info",
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cl::desc("Print the instruction info view (enabled by default)"),
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cl::cat(ViewOptions), cl::init(true));
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static cl::opt<bool> EnableAllStats("all-stats",
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cl::desc("Print all hardware statistics"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool>
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EnableAllViews("all-views",
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cl::desc("Print all views including hardware statistics"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool> EnableBottleneckAnalysis(
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"bottleneck-analysis",
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cl::desc("Enable bottleneck analysis (disabled by default)"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool> ShowEncoding(
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"show-encoding",
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cl::desc("Print encoding information in the instruction info view"),
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cl::cat(ViewOptions), cl::init(false));
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static cl::opt<bool> DisableCustomBehaviour(
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"disable-cb",
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cl::desc(
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"Disable custom behaviour (use the default class which does nothing)."),
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cl::cat(ViewOptions), cl::init(false));
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namespace {
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const Target *getTarget(const char *ProgName) {
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if (TripleName.empty())
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TripleName = Triple::normalize(sys::getDefaultTargetTriple());
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Triple TheTriple(TripleName);
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// Get the target specific parser.
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std::string Error;
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const Target *TheTarget =
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TargetRegistry::lookupTarget(ArchName, TheTriple, Error);
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if (!TheTarget) {
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errs() << ProgName << ": " << Error;
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return nullptr;
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}
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// Update TripleName with the updated triple from the target lookup.
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TripleName = TheTriple.str();
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// Return the found target.
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return TheTarget;
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}
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ErrorOr<std::unique_ptr<ToolOutputFile>> getOutputStream() {
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if (OutputFilename == "")
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OutputFilename = "-";
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std::error_code EC;
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auto Out = std::make_unique<ToolOutputFile>(OutputFilename, EC,
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sys::fs::OF_TextWithCRLF);
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if (!EC)
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return std::move(Out);
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return EC;
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}
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} // end of anonymous namespace
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static void processOptionImpl(cl::opt<bool> &O, const cl::opt<bool> &Default) {
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if (!O.getNumOccurrences() || O.getPosition() < Default.getPosition())
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O = Default.getValue();
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}
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static void processViewOptions(bool IsOutOfOrder) {
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if (!EnableAllViews.getNumOccurrences() &&
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!EnableAllStats.getNumOccurrences())
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return;
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if (EnableAllViews.getNumOccurrences()) {
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processOptionImpl(PrintSummaryView, EnableAllViews);
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if (IsOutOfOrder)
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processOptionImpl(EnableBottleneckAnalysis, EnableAllViews);
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processOptionImpl(PrintResourcePressureView, EnableAllViews);
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processOptionImpl(PrintTimelineView, EnableAllViews);
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processOptionImpl(PrintInstructionInfoView, EnableAllViews);
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}
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const cl::opt<bool> &Default =
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EnableAllViews.getPosition() < EnableAllStats.getPosition()
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? EnableAllStats
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: EnableAllViews;
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processOptionImpl(PrintRegisterFileStats, Default);
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processOptionImpl(PrintDispatchStats, Default);
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processOptionImpl(PrintSchedulerStats, Default);
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if (IsOutOfOrder)
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processOptionImpl(PrintRetireStats, Default);
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}
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std::unique_ptr<mca::InstrPostProcess>
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createInstrPostProcess(const Triple &TheTriple, const MCSubtargetInfo &STI,
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const MCInstrInfo &MCII) {
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// Might be a good idea to have a separate flag so that InstrPostProcess
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// can be used with or without CustomBehaviour
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if (DisableCustomBehaviour)
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return std::make_unique<mca::InstrPostProcess>(STI, MCII);
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#ifdef HAS_AMDGPU
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if (TheTriple.isAMDGPU())
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return std::make_unique<mca::AMDGPUInstrPostProcess>(STI, MCII);
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#endif
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return std::make_unique<mca::InstrPostProcess>(STI, MCII);
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}
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std::unique_ptr<mca::CustomBehaviour>
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createCustomBehaviour(const Triple &TheTriple, const MCSubtargetInfo &STI,
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const mca::SourceMgr &SrcMgr, const MCInstrInfo &MCII) {
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// Build the appropriate CustomBehaviour object for the current target.
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// The CustomBehaviour class should never depend on the source code,
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// but it can depend on the list of mca::Instruction and any classes
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// that can be built using just the target info. If you need extra
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// information from the source code or the list of MCInst, consider
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// adding that information to the mca::Instruction class and setting
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// it during InstrBuilder::createInstruction().
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if (DisableCustomBehaviour)
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return std::make_unique<mca::CustomBehaviour>(STI, SrcMgr, MCII);
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#ifdef HAS_AMDGPU
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if (TheTriple.isAMDGPU())
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return std::make_unique<mca::AMDGPUCustomBehaviour>(STI, SrcMgr, MCII);
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#endif
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return std::make_unique<mca::CustomBehaviour>(STI, SrcMgr, MCII);
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}
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// Returns true on success.
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static bool runPipeline(mca::Pipeline &P) {
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// Handle pipeline errors here.
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Expected<unsigned> Cycles = P.run();
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if (!Cycles) {
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WithColor::error() << toString(Cycles.takeError());
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return false;
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}
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return true;
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}
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int main(int argc, char **argv) {
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InitLLVM X(argc, argv);
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// Initialize targets and assembly parsers.
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InitializeAllTargetInfos();
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InitializeAllTargetMCs();
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InitializeAllAsmParsers();
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// Enable printing of available targets when flag --version is specified.
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cl::AddExtraVersionPrinter(TargetRegistry::printRegisteredTargetsForVersion);
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cl::HideUnrelatedOptions({&ToolOptions, &ViewOptions});
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// Parse flags and initialize target options.
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cl::ParseCommandLineOptions(argc, argv,
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"llvm machine code performance analyzer.\n");
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// Get the target from the triple. If a triple is not specified, then select
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// the default triple for the host. If the triple doesn't correspond to any
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// registered target, then exit with an error message.
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const char *ProgName = argv[0];
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const Target *TheTarget = getTarget(ProgName);
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if (!TheTarget)
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return 1;
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// GetTarget() may replaced TripleName with a default triple.
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// For safety, reconstruct the Triple object.
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Triple TheTriple(TripleName);
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ErrorOr<std::unique_ptr<MemoryBuffer>> BufferPtr =
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MemoryBuffer::getFileOrSTDIN(InputFilename);
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if (std::error_code EC = BufferPtr.getError()) {
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WithColor::error() << InputFilename << ": " << EC.message() << '\n';
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return 1;
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}
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if (MCPU == "native")
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MCPU = std::string(llvm::sys::getHostCPUName());
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std::unique_ptr<MCSubtargetInfo> STI(
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TheTarget->createMCSubtargetInfo(TripleName, MCPU, MATTR));
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assert(STI && "Unable to create subtarget info!");
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if (!STI->isCPUStringValid(MCPU))
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return 1;
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bool IsOutOfOrder = STI->getSchedModel().isOutOfOrder();
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if (!PrintInstructionTables && !IsOutOfOrder) {
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WithColor::warning() << "support for in-order CPU '" << MCPU
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<< "' is experimental.\n";
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}
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if (!STI->getSchedModel().hasInstrSchedModel()) {
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WithColor::error()
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<< "unable to find instruction-level scheduling information for"
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<< " target triple '" << TheTriple.normalize() << "' and cpu '" << MCPU
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<< "'.\n";
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if (STI->getSchedModel().InstrItineraries)
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WithColor::note()
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<< "cpu '" << MCPU << "' provides itineraries. However, "
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<< "instruction itineraries are currently unsupported.\n";
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return 1;
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}
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// Apply overrides to llvm-mca specific options.
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processViewOptions(IsOutOfOrder);
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std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
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assert(MRI && "Unable to create target register info!");
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MCTargetOptions MCOptions = mc::InitMCTargetOptionsFromFlags();
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std::unique_ptr<MCAsmInfo> MAI(
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TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));
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assert(MAI && "Unable to create target asm info!");
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SourceMgr SrcMgr;
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// Tell SrcMgr about this buffer, which is what the parser will pick up.
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SrcMgr.AddNewSourceBuffer(std::move(*BufferPtr), SMLoc());
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MCContext Ctx(TheTriple, MAI.get(), MRI.get(), STI.get(), &SrcMgr);
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std::unique_ptr<MCObjectFileInfo> MOFI(
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TheTarget->createMCObjectFileInfo(Ctx, /*PIC=*/false));
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Ctx.setObjectFileInfo(MOFI.get());
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std::unique_ptr<buffer_ostream> BOS;
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std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo());
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assert(MCII && "Unable to create instruction info!");
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std::unique_ptr<MCInstrAnalysis> MCIA(
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TheTarget->createMCInstrAnalysis(MCII.get()));
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// Need to initialize an MCInstPrinter as it is
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// required for initializing the MCTargetStreamer
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// which needs to happen within the CRG.parseCodeRegions() call below.
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// Without an MCTargetStreamer, certain assembly directives can trigger a
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// segfault. (For example, the .cv_fpo_proc directive on x86 will segfault if
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// we don't initialize the MCTargetStreamer.)
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unsigned IPtempOutputAsmVariant =
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OutputAsmVariant == -1 ? 0 : OutputAsmVariant;
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std::unique_ptr<MCInstPrinter> IPtemp(TheTarget->createMCInstPrinter(
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Triple(TripleName), IPtempOutputAsmVariant, *MAI, *MCII, *MRI));
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if (!IPtemp) {
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WithColor::error()
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<< "unable to create instruction printer for target triple '"
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<< TheTriple.normalize() << "' with assembly variant "
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<< IPtempOutputAsmVariant << ".\n";
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return 1;
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}
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// Parse the input and create CodeRegions that llvm-mca can analyze.
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mca::AsmCodeRegionGenerator CRG(*TheTarget, SrcMgr, Ctx, *MAI, *STI, *MCII);
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Expected<const mca::CodeRegions &> RegionsOrErr =
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CRG.parseCodeRegions(std::move(IPtemp));
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if (!RegionsOrErr) {
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if (auto Err =
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handleErrors(RegionsOrErr.takeError(), [](const StringError &E) {
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WithColor::error() << E.getMessage() << '\n';
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})) {
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// Default case.
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WithColor::error() << toString(std::move(Err)) << '\n';
|
|
}
|
|
return 1;
|
|
}
|
|
const mca::CodeRegions &Regions = *RegionsOrErr;
|
|
|
|
// Early exit if errors were found by the code region parsing logic.
|
|
if (!Regions.isValid())
|
|
return 1;
|
|
|
|
if (Regions.empty()) {
|
|
WithColor::error() << "no assembly instructions found.\n";
|
|
return 1;
|
|
}
|
|
|
|
// Now initialize the output file.
|
|
auto OF = getOutputStream();
|
|
if (std::error_code EC = OF.getError()) {
|
|
WithColor::error() << EC.message() << '\n';
|
|
return 1;
|
|
}
|
|
|
|
unsigned AssemblerDialect = CRG.getAssemblerDialect();
|
|
if (OutputAsmVariant >= 0)
|
|
AssemblerDialect = static_cast<unsigned>(OutputAsmVariant);
|
|
std::unique_ptr<MCInstPrinter> IP(TheTarget->createMCInstPrinter(
|
|
Triple(TripleName), AssemblerDialect, *MAI, *MCII, *MRI));
|
|
if (!IP) {
|
|
WithColor::error()
|
|
<< "unable to create instruction printer for target triple '"
|
|
<< TheTriple.normalize() << "' with assembly variant "
|
|
<< AssemblerDialect << ".\n";
|
|
return 1;
|
|
}
|
|
|
|
// Set the display preference for hex vs. decimal immediates.
|
|
IP->setPrintImmHex(PrintImmHex);
|
|
|
|
std::unique_ptr<ToolOutputFile> TOF = std::move(*OF);
|
|
|
|
const MCSchedModel &SM = STI->getSchedModel();
|
|
|
|
// Create an instruction builder.
|
|
mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());
|
|
|
|
// Create a context to control ownership of the pipeline hardware.
|
|
mca::Context MCA(*MRI, *STI);
|
|
|
|
mca::PipelineOptions PO(MicroOpQueue, DecoderThroughput, DispatchWidth,
|
|
RegisterFileSize, LoadQueueSize, StoreQueueSize,
|
|
AssumeNoAlias, EnableBottleneckAnalysis);
|
|
|
|
// Number each region in the sequence.
|
|
unsigned RegionIdx = 0;
|
|
|
|
std::unique_ptr<MCCodeEmitter> MCE(
|
|
TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx));
|
|
assert(MCE && "Unable to create code emitter!");
|
|
|
|
std::unique_ptr<MCAsmBackend> MAB(TheTarget->createMCAsmBackend(
|
|
*STI, *MRI, mc::InitMCTargetOptionsFromFlags()));
|
|
assert(MAB && "Unable to create asm backend!");
|
|
|
|
for (const std::unique_ptr<mca::CodeRegion> &Region : Regions) {
|
|
// Skip empty code regions.
|
|
if (Region->empty())
|
|
continue;
|
|
|
|
// Don't print the header of this region if it is the default region, and
|
|
// it doesn't have an end location.
|
|
if (Region->startLoc().isValid() || Region->endLoc().isValid()) {
|
|
TOF->os() << "\n[" << RegionIdx++ << "] Code Region";
|
|
StringRef Desc = Region->getDescription();
|
|
if (!Desc.empty())
|
|
TOF->os() << " - " << Desc;
|
|
TOF->os() << "\n\n";
|
|
}
|
|
|
|
// Lower the MCInst sequence into an mca::Instruction sequence.
|
|
ArrayRef<MCInst> Insts = Region->getInstructions();
|
|
mca::CodeEmitter CE(*STI, *MAB, *MCE, Insts);
|
|
std::unique_ptr<mca::InstrPostProcess> IPP =
|
|
createInstrPostProcess(TheTriple, *STI, *MCII);
|
|
std::vector<std::unique_ptr<mca::Instruction>> LoweredSequence;
|
|
for (const MCInst &MCI : Insts) {
|
|
Expected<std::unique_ptr<mca::Instruction>> Inst =
|
|
IB.createInstruction(MCI);
|
|
if (!Inst) {
|
|
if (auto NewE = handleErrors(
|
|
Inst.takeError(),
|
|
[&IP, &STI](const mca::InstructionError<MCInst> &IE) {
|
|
std::string InstructionStr;
|
|
raw_string_ostream SS(InstructionStr);
|
|
WithColor::error() << IE.Message << '\n';
|
|
IP->printInst(&IE.Inst, 0, "", *STI, SS);
|
|
SS.flush();
|
|
WithColor::note()
|
|
<< "instruction: " << InstructionStr << '\n';
|
|
})) {
|
|
// Default case.
|
|
WithColor::error() << toString(std::move(NewE));
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
IPP->postProcessInstruction(Inst.get(), MCI);
|
|
|
|
LoweredSequence.emplace_back(std::move(Inst.get()));
|
|
}
|
|
|
|
mca::SourceMgr S(LoweredSequence, PrintInstructionTables ? 1 : Iterations);
|
|
|
|
if (PrintInstructionTables) {
|
|
// Create a pipeline, stages, and a printer.
|
|
auto P = std::make_unique<mca::Pipeline>();
|
|
P->appendStage(std::make_unique<mca::EntryStage>(S));
|
|
P->appendStage(std::make_unique<mca::InstructionTables>(SM));
|
|
mca::PipelinePrinter Printer(*P, mca::View::OK_READABLE);
|
|
|
|
// Create the views for this pipeline, execute, and emit a report.
|
|
if (PrintInstructionInfoView) {
|
|
Printer.addView(std::make_unique<mca::InstructionInfoView>(
|
|
*STI, *MCII, CE, ShowEncoding, Insts, *IP));
|
|
}
|
|
Printer.addView(
|
|
std::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
|
|
|
|
if (!runPipeline(*P))
|
|
return 1;
|
|
|
|
Printer.printReport(TOF->os());
|
|
continue;
|
|
}
|
|
|
|
// Create the CustomBehaviour object for enforcing Target Specific
|
|
// behaviours and dependencies that aren't expressed well enough
|
|
// in the tablegen. CB cannot depend on the list of MCInst or
|
|
// the source code (but it can depend on the list of
|
|
// mca::Instruction or any objects that can be reconstructed
|
|
// from the target information).
|
|
std::unique_ptr<mca::CustomBehaviour> CB =
|
|
createCustomBehaviour(TheTriple, *STI, S, *MCII);
|
|
|
|
// Create a basic pipeline simulating an out-of-order backend.
|
|
auto P = MCA.createDefaultPipeline(PO, S, *CB);
|
|
mca::PipelinePrinter Printer(*P, PrintJson ? mca::View::OK_JSON
|
|
: mca::View::OK_READABLE);
|
|
|
|
// When we output JSON, we add a view that contains the instructions
|
|
// and CPU resource information.
|
|
if (PrintJson)
|
|
Printer.addView(
|
|
std::make_unique<mca::InstructionView>(*STI, *IP, Insts, MCPU));
|
|
|
|
if (PrintSummaryView)
|
|
Printer.addView(
|
|
std::make_unique<mca::SummaryView>(SM, Insts, DispatchWidth));
|
|
|
|
if (EnableBottleneckAnalysis) {
|
|
if (!IsOutOfOrder) {
|
|
WithColor::warning()
|
|
<< "bottleneck analysis is not supported for in-order CPU '" << MCPU
|
|
<< "'.\n";
|
|
}
|
|
Printer.addView(std::make_unique<mca::BottleneckAnalysis>(
|
|
*STI, *IP, Insts, S.getNumIterations()));
|
|
}
|
|
|
|
if (PrintInstructionInfoView)
|
|
Printer.addView(std::make_unique<mca::InstructionInfoView>(
|
|
*STI, *MCII, CE, ShowEncoding, Insts, *IP));
|
|
|
|
if (PrintDispatchStats)
|
|
Printer.addView(std::make_unique<mca::DispatchStatistics>());
|
|
|
|
if (PrintSchedulerStats)
|
|
Printer.addView(std::make_unique<mca::SchedulerStatistics>(*STI));
|
|
|
|
if (PrintRetireStats)
|
|
Printer.addView(std::make_unique<mca::RetireControlUnitStatistics>(SM));
|
|
|
|
if (PrintRegisterFileStats)
|
|
Printer.addView(std::make_unique<mca::RegisterFileStatistics>(*STI));
|
|
|
|
if (PrintResourcePressureView)
|
|
Printer.addView(
|
|
std::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
|
|
|
|
if (PrintTimelineView) {
|
|
unsigned TimelineIterations =
|
|
TimelineMaxIterations ? TimelineMaxIterations : 10;
|
|
Printer.addView(std::make_unique<mca::TimelineView>(
|
|
*STI, *IP, Insts, std::min(TimelineIterations, S.getNumIterations()),
|
|
TimelineMaxCycles));
|
|
}
|
|
|
|
if (!runPipeline(*P))
|
|
return 1;
|
|
|
|
Printer.printReport(TOF->os());
|
|
|
|
// Clear the InstrBuilder internal state in preparation for another round.
|
|
IB.clear();
|
|
}
|
|
|
|
TOF->keep();
|
|
return 0;
|
|
}
|