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Previously we emitted something like rotl(x, n) { n &= bitwidth-1; return n != 0 ? ((x << n) | (x >> (bitwidth - n)) : x; } We use a select to avoid the undefined behavior on the (bitwidth - n) shift. The middle and backend don't really recognize this as a rotate and end up emitting a cmov or control flow because of the select. A better pattern is (x << (n & mask)) | (x << (-n & mask)) where mask is bitwidth - 1. Fixes the main complaint in PR37387. There's still some work to be done if the user writes that sequence directly on a short or char where type promotion rules can prevent it from being recognized. The builtin is emitting direct IR with unpromoted types so that isn't a problem for it. Differential Revision: https://reviews.llvm.org/D46656 llvm-svn: 331943
158 lines
6.8 KiB
C
158 lines
6.8 KiB
C
// RUN: %clang_cc1 -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \
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// RUN: -triple i686--windows -emit-llvm %s -o - \
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// RUN: | FileCheck %s --check-prefixes CHECK,CHECK-32BIT-LONG
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// RUN: %clang_cc1 -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \
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// RUN: -triple thumbv7--windows -emit-llvm %s -o - \
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// RUN: | FileCheck %s --check-prefixes CHECK,CHECK-32BIT-LONG
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// RUN: %clang_cc1 -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \
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// RUN: -triple x86_64--windows -emit-llvm %s -o - \
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// RUN: | FileCheck %s --check-prefixes CHECK,CHECK-32BIT-LONG
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// RUN: %clang_cc1 -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \
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// RUN: -triple i686--linux -emit-llvm %s -o - \
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// RUN: | FileCheck %s --check-prefixes CHECK,CHECK-32BIT-LONG
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// RUN: %clang_cc1 -ffreestanding -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 \
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// RUN: -triple x86_64--linux -emit-llvm %s -o - \
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// RUN: | FileCheck %s --check-prefixes CHECK,CHECK-32BIT-LONG
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// RUN: %clang_cc1 -ffreestanding -fms-extensions \
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// RUN: -triple x86_64--darwin -emit-llvm %s -o - \
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// RUN: | FileCheck %s --check-prefixes CHECK,CHECK-32BIT-LONG
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// LP64 targets use 'long' as 'int' for MS intrinsics (-fms-extensions)
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#ifdef __LP64__
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#define LONG int
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#else
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#define LONG long
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#endif
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// rotate left
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unsigned char test_rotl8(unsigned char value, unsigned char shift) {
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return _rotl8(value, shift);
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}
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// CHECK: i8 @test_rotl8
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// CHECK: [[LSHIFT:%[0-9]+]] = and i8 [[SHIFT:%[0-9]+]], 7
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// CHECK: [[HIGH:%[0-9]+]] = shl i8 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i8 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i8 [[NEGATE]], 7
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// CHECK: [[LOW:%[0-9]+]] = lshr i8 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i8 [[HIGH]], [[LOW]]
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// CHECK: ret i8 [[RESULT]]
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// CHECK }
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unsigned short test_rotl16(unsigned short value, unsigned char shift) {
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return _rotl16(value, shift);
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}
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// CHECK: i16 @test_rotl16
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// CHECK: [[LSHIFT:%[0-9]+]] = and i16 [[SHIFT:%[0-9]+]], 15
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// CHECK: [[HIGH:%[0-9]+]] = shl i16 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i16 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i16 [[NEGATE]], 15
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// CHECK: [[LOW:%[0-9]+]] = lshr i16 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i16 [[HIGH]], [[LOW]]
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// CHECK: ret i16 [[RESULT]]
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// CHECK }
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unsigned int test_rotl(unsigned int value, int shift) {
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return _rotl(value, shift);
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}
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// CHECK: i32 @test_rotl
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// CHECK: [[LSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
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// CHECK: [[HIGH:%[0-9]+]] = shl i32 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
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// CHECK: [[LOW:%[0-9]+]] = lshr i32 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
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// CHECK: ret i32 [[RESULT]]
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// CHECK }
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unsigned LONG test_lrotl(unsigned LONG value, int shift) {
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return _lrotl(value, shift);
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}
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// CHECK-32BIT-LONG: i32 @test_lrotl
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// CHECK-32BIT-LONG: [[LSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
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// CHECK-32BIT-LONG: [[HIGH:%[0-9]+]] = shl i32 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK-32BIT-LONG: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
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// CHECK-32BIT-LONG: [[RSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
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// CHECK-32BIT-LONG: [[LOW:%[0-9]+]] = lshr i32 [[VALUE]], [[RSHIFT]]
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// CHECK-32BIT-LONG: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
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// CHECK-32BIT-LONG: ret i32 [[RESULT]]
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// CHECK-32BIT-LONG }
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unsigned __int64 test_rotl64(unsigned __int64 value, int shift) {
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return _rotl64(value, shift);
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}
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// CHECK: i64 @test_rotl64
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// CHECK: [[LSHIFT:%[0-9]+]] = and i64 [[SHIFT:%[0-9]+]], 63
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// CHECK: [[HIGH:%[0-9]+]] = shl i64 [[VALUE:%[0-9]+]], [[LSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i64 0, [[SHIFT]]
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// CHECK: [[RSHIFT:%[0-9]+]] = and i64 [[NEGATE]], 63
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// CHECK: [[LOW:%[0-9]+]] = lshr i64 [[VALUE]], [[RSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i64 [[HIGH]], [[LOW]]
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// CHECK: ret i64 [[RESULT]]
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// CHECK }
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// rotate right
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unsigned char test_rotr8(unsigned char value, unsigned char shift) {
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return _rotr8(value, shift);
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}
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// CHECK: i8 @test_rotr8
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// CHECK: [[RSHIFT:%[0-9]+]] = and i8 [[SHIFT:%[0-9]+]], 7
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// CHECK: [[LOW:%[0-9]+]] = lshr i8 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i8 0, [[SHIFT]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i8 [[NEGATE]], 7
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// CHECK: [[HIGH:%[0-9]+]] = shl i8 [[VALUE]], [[LSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i8 [[HIGH]], [[LOW]]
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// CHECK }
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unsigned short test_rotr16(unsigned short value, unsigned char shift) {
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return _rotr16(value, shift);
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}
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// CHECK: i16 @test_rotr16
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// CHECK: [[RSHIFT:%[0-9]+]] = and i16 [[SHIFT:%[0-9]+]], 15
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// CHECK: [[LOW:%[0-9]+]] = lshr i16 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i16 0, [[SHIFT]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i16 [[NEGATE]], 15
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// CHECK: [[HIGH:%[0-9]+]] = shl i16 [[VALUE]], [[LSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i16 [[HIGH]], [[LOW]]
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// CHECK }
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unsigned int test_rotr(unsigned int value, int shift) {
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return _rotr(value, shift);
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}
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// CHECK: i32 @test_rotr
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// CHECK: [[RSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
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// CHECK: [[LOW:%[0-9]+]] = lshr i32 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
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// CHECK: [[HIGH:%[0-9]+]] = shl i32 [[VALUE]], [[LSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
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// CHECK: ret i32 [[RESULT]]
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// CHECK }
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unsigned LONG test_lrotr(unsigned LONG value, int shift) {
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return _lrotr(value, shift);
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}
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// CHECK-32BIT-LONG: i32 @test_lrotr
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// CHECK-32BIT-LONG: [[RSHIFT:%[0-9]+]] = and i32 [[SHIFT:%[0-9]+]], 31
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// CHECK-32BIT-LONG: [[LOW:%[0-9]+]] = lshr i32 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK-32BIT-LONG: [[NEGATE:%[0-9]+]] = sub i32 0, [[SHIFT]]
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// CHECK-32BIT-LONG: [[LSHIFT:%[0-9]+]] = and i32 [[NEGATE]], 31
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// CHECK-32BIT-LONG: [[HIGH:%[0-9]+]] = shl i32 [[VALUE]], [[LSHIFT]]
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// CHECK-32BIT-LONG: [[RESULT:%[0-9]+]] = or i32 [[HIGH]], [[LOW]]
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// CHECK-32BIT-LONG: ret i32 [[RESULT]]
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// CHECK-32BIT-LONG }
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unsigned __int64 test_rotr64(unsigned __int64 value, int shift) {
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return _rotr64(value, shift);
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}
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// CHECK: i64 @test_rotr64
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// CHECK: [[RSHIFT:%[0-9]+]] = and i64 [[SHIFT:%[0-9]+]], 63
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// CHECK: [[LOW:%[0-9]+]] = lshr i64 [[VALUE:%[0-9]+]], [[RSHIFT]]
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// CHECK: [[NEGATE:%[0-9]+]] = sub i64 0, [[SHIFT]]
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// CHECK: [[LSHIFT:%[0-9]+]] = and i64 [[NEGATE]], 63
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// CHECK: [[HIGH:%[0-9]+]] = shl i64 [[VALUE]], [[LSHIFT]]
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// CHECK: [[RESULT:%[0-9]+]] = or i64 [[HIGH]], [[LOW]]
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// CHECK: ret i64 [[RESULT]]
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// CHECK }
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