mirror of
https://github.com/llvm/llvm-project.git
synced 2025-04-29 03:56:06 +00:00
f7a07a5010
This adds support for the PPC "wc" inline asm constraint (used for allocating individual CR bits). Support for this constraint type was recently added to the LLVM PowerPC backend. Although gcc does not currently support allocating individual CR bits, this identifier choice has been coordinated with the gcc PowerPC team, and will be marked as reserved for this purpose in the gcc constraints.md file. Prior to this change, none of the multi-character PPC constraints were handled correctly (the '^' escape character was not being added as required by the parsing code in LLVM). This should now be fixed. I'll add tests for these other constraints as support is added for them in the backend. llvm-svn: 202658
27 lines
946 B
C
27 lines
946 B
C
// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -O2 -emit-llvm -o - %s | FileCheck %s
|
|
|
|
_Bool test_wc_i1(_Bool b1, _Bool b2) {
|
|
_Bool o;
|
|
asm("crand %0, %1, %2" : "=wc"(o) : "wc"(b1), "wc"(b2) : );
|
|
return o;
|
|
// CHECK-LABEL: define zeroext i1 @test_wc_i1(i1 zeroext %b1, i1 zeroext %b2)
|
|
// CHECK: call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2)
|
|
}
|
|
|
|
int test_wc_i32(int b1, int b2) {
|
|
int o;
|
|
asm("crand %0, %1, %2" : "=wc"(o) : "wc"(b1), "wc"(b2) : );
|
|
return o;
|
|
// CHECK-LABEL: signext i32 @test_wc_i32(i32 signext %b1, i32 signext %b2)
|
|
// CHECK: call i32 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i32 %b1, i32 %b2)
|
|
}
|
|
|
|
unsigned char test_wc_i8(unsigned char b1, unsigned char b2) {
|
|
unsigned char o;
|
|
asm("crand %0, %1, %2" : "=wc"(o) : "wc"(b1), "wc"(b2) : );
|
|
return o;
|
|
// CHECK-LABEL: zeroext i8 @test_wc_i8(i8 zeroext %b1, i8 zeroext %b2)
|
|
// CHECK: call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i8 %b1, i8 %b2)
|
|
}
|
|
|