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### 2nd submission The buildbots are using python 3.8, and some type annotations I was using are only available starting 3.9. The last commit on the pile is the additional changes compared to the original submission https://github.com/llvm/llvm-project/pull/104020. ### Original text: Currently, the testing infrastructure for SPIR-V is based on FileCheck. Those tests are great to check some level of codegen, but when the test needs check both the CFG layout and the content of each basic-block, things becomes messy. Because the CHECK/CHECK-DAG/CHECK-NEXT state is limited, it is sometimes hard to catch the good block: if 2 basic blocks have similar instructions, FileCheck can match the wrong one. Cross-lane interaction can be a bit difficult to understand, and writting a FileCheck test that is strong enough to catch bad CFG transforms while not being broken everytime some unrelated codegen part changes is hard. And lastly, the spirv-val tooling we have checks that the generated SPIR-V respects the spec, not that it is correct in regards to the source IR. For those reasons, I believe the best way to test the structurizer is to: run spirv-val to make sure the CFG respects the spec. simulate the function to validate result for each lane, making sure the generated code is correct. This simulator has no other dependencies than core python. It also only supports a very limited set of instructions as we can test most features through control-flow and some basic cross-lane interactions. As-is, the added tests are just a harness for the simulator itself. If this gets merged, the structurizer PR will benefit from this as I'll be able to add extensive testing using this. --------- Signed-off-by: Nathan Gauër <brioche@google.com>
382 lines
11 KiB
Python
382 lines
11 KiB
Python
from typing import Optional, List
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# Base class for an instruction. To implement a basic instruction that doesn't
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# impact the control-flow, create a new class inheriting from this.
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class Instruction:
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# Contains the name of the output register, if any.
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_result: Optional[str]
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# Contains the instruction opcode.
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_opcode: str
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# Contains all the instruction operands, except result and opcode.
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_operands: List[str]
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def __init__(self, line: str):
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self.line = line
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tokens = line.split()
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if len(tokens) > 1 and tokens[1] == "=":
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self._result = tokens[0]
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self._opcode = tokens[2]
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self._operands = tokens[3:] if len(tokens) > 2 else []
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else:
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self._result = None
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self._opcode = tokens[0]
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self._operands = tokens[1:] if len(tokens) > 1 else []
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def __str__(self):
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if self._result is None:
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return f" {self._opcode} {self._operands}"
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return f"{self._result:3} = {self._opcode} {self._operands}"
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# Returns the instruction opcode.
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def opcode(self) -> str:
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return self._opcode
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# Returns the instruction operands.
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def operands(self) -> List[str]:
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return self._operands
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# Returns the instruction output register. Calling this function is
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# only allowed if has_output_register() is true.
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def output_register(self) -> str:
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assert self._result is not None
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return self._result
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# Returns true if this function has an output register. False otherwise.
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def has_output_register(self) -> bool:
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return self._result is not None
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# This function is used to initialize state related to this instruction
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# before module execution begins. For example, global Input variables
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# can use this to store the lane ID into the register.
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def static_execution(self, lane):
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pass
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# This function is called everytime this instruction is executed by a
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# tangle. This function should not be directly overriden, instead see
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# _impl and _advance_ip.
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def runtime_execution(self, module, lane):
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self._impl(module, lane)
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self._advance_ip(module, lane)
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# This function needs to be overriden if your instruction can be executed.
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# It implements the logic of the instruction.
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# 'Static' instructions like OpConstant should not override this since
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# they are not supposed to be executed at runtime.
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def _impl(self, module, lane):
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raise RuntimeError(f"Unimplemented instruction {self}")
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# By default, IP is incremented to point to the next instruction.
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# If the instruction modifies IP (like OpBranch), this must be overridden.
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def _advance_ip(self, module, lane):
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lane.set_ip(lane.ip() + 1)
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# Those are parsed, but never executed.
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class OpEntryPoint(Instruction):
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pass
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class OpFunction(Instruction):
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pass
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class OpFunctionEnd(Instruction):
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pass
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class OpLabel(Instruction):
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pass
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class OpVariable(Instruction):
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pass
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class OpName(Instruction):
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def name(self) -> str:
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return self._operands[1][1:-1]
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def decoratedRegister(self) -> str:
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return self._operands[0]
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# The only decoration we use if the BuiltIn one to initialize the values.
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class OpDecorate(Instruction):
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def static_execution(self, lane):
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if self._operands[1] == "LinkageAttributes":
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return
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assert (
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self._operands[1] == "BuiltIn"
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and self._operands[2] == "SubgroupLocalInvocationId"
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)
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lane.set_register(self._operands[0], lane.tid())
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# Constants
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class OpConstant(Instruction):
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def static_execution(self, lane):
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lane.set_register(self._result, int(self._operands[1]))
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class OpConstantTrue(OpConstant):
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def static_execution(self, lane):
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lane.set_register(self._result, True)
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class OpConstantFalse(OpConstant):
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def static_execution(self, lane):
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lane.set_register(self._result, False)
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class OpConstantComposite(OpConstant):
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def static_execution(self, lane):
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result = []
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for op in self._operands[1:]:
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result.append(lane.get_register(op))
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lane.set_register(self._result, result)
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# Control flow instructions
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class OpFunctionCall(Instruction):
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def _impl(self, module, lane):
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pass
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def _advance_ip(self, module, lane):
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entry = module.get_function_entry(self._operands[1])
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lane.do_call(entry, self._result)
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class OpReturn(Instruction):
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def _impl(self, module, lane):
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pass
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def _advance_ip(self, module, lane):
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lane.do_return(None)
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class OpReturnValue(Instruction):
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def _impl(self, module, lane):
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pass
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def _advance_ip(self, module, lane):
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lane.do_return(lane.get_register(self._operands[0]))
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class OpBranch(Instruction):
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def _impl(self, module, lane):
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pass
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def _advance_ip(self, module, lane):
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lane.set_ip(module.get_bb_entry(self._operands[0]))
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pass
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class OpBranchConditional(Instruction):
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def _impl(self, module, lane):
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pass
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def _advance_ip(self, module, lane):
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condition = lane.get_register(self._operands[0])
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if condition:
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lane.set_ip(module.get_bb_entry(self._operands[1]))
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else:
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lane.set_ip(module.get_bb_entry(self._operands[2]))
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class OpSwitch(Instruction):
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def _impl(self, module, lane):
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pass
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def _advance_ip(self, module, lane):
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value = lane.get_register(self._operands[0])
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default_label = self._operands[1]
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i = 2
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while i < len(self._operands):
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imm = int(self._operands[i])
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label = self._operands[i + 1]
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if value == imm:
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lane.set_ip(module.get_bb_entry(label))
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return
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i += 2
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lane.set_ip(module.get_bb_entry(default_label))
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class OpUnreachable(Instruction):
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def _impl(self, module, lane):
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raise RuntimeError("This instruction should never be executed.")
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# Convergence instructions
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class MergeInstruction(Instruction):
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def merge_location(self):
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return self._operands[0]
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def continue_location(self):
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return None if len(self._operands) < 3 else self._operands[1]
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def _impl(self, module, lane):
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lane.handle_convergence_header(self)
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class OpLoopMerge(MergeInstruction):
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pass
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class OpSelectionMerge(MergeInstruction):
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pass
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# Other instructions
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class OpBitcast(Instruction):
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def _impl(self, module, lane):
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# TODO: find out the type from the defining instruction.
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# This can only work for DXC.
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if self._operands[0] == "%int":
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lane.set_register(self._result, int(lane.get_register(self._operands[1])))
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else:
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raise RuntimeError("Unsupported OpBitcast operand")
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class OpAccessChain(Instruction):
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def _impl(self, module, lane):
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# Python dynamic types allows me to simplify. As long as the SPIR-V
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# is legal, this should be fine.
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# Note: SPIR-V structs are stored as tuples
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value = lane.get_register(self._operands[1])
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for operand in self._operands[2:]:
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value = value[lane.get_register(operand)]
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lane.set_register(self._result, value)
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class OpCompositeConstruct(Instruction):
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def _impl(self, module, lane):
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output = []
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for op in self._operands[1:]:
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output.append(lane.get_register(op))
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lane.set_register(self._result, output)
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class OpCompositeExtract(Instruction):
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def _impl(self, module, lane):
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value = lane.get_register(self._operands[1])
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output = value
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for op in self._operands[2:]:
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output = output[int(op)]
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lane.set_register(self._result, output)
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class OpStore(Instruction):
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def _impl(self, module, lane):
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lane.set_register(self._operands[0], lane.get_register(self._operands[1]))
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class OpLoad(Instruction):
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def _impl(self, module, lane):
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lane.set_register(self._result, lane.get_register(self._operands[1]))
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class OpIAdd(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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RHS = lane.get_register(self._operands[2])
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lane.set_register(self._result, LHS + RHS)
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class OpISub(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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RHS = lane.get_register(self._operands[2])
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lane.set_register(self._result, LHS - RHS)
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class OpIMul(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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RHS = lane.get_register(self._operands[2])
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lane.set_register(self._result, LHS * RHS)
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class OpLogicalNot(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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lane.set_register(self._result, not LHS)
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class _LessThan(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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RHS = lane.get_register(self._operands[2])
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lane.set_register(self._result, LHS < RHS)
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class _GreaterThan(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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RHS = lane.get_register(self._operands[2])
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lane.set_register(self._result, LHS > RHS)
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class OpSLessThan(_LessThan):
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pass
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class OpULessThan(_LessThan):
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pass
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class OpSGreaterThan(_GreaterThan):
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pass
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class OpUGreaterThan(_GreaterThan):
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pass
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class OpIEqual(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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RHS = lane.get_register(self._operands[2])
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lane.set_register(self._result, LHS == RHS)
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class OpINotEqual(Instruction):
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def _impl(self, module, lane):
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LHS = lane.get_register(self._operands[1])
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RHS = lane.get_register(self._operands[2])
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lane.set_register(self._result, LHS != RHS)
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class OpPhi(Instruction):
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def _impl(self, module, lane):
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previousBBName = lane.get_previous_bb_name()
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i = 1
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while i < len(self._operands):
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label = self._operands[i + 1]
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if label == previousBBName:
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lane.set_register(self._result, lane.get_register(self._operands[i]))
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return
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i += 2
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raise RuntimeError("previousBB not in the OpPhi _operands")
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class OpSelect(Instruction):
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def _impl(self, module, lane):
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condition = lane.get_register(self._operands[1])
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value = lane.get_register(self._operands[2 if condition else 3])
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lane.set_register(self._result, value)
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# Wave intrinsics
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class OpGroupNonUniformBroadcastFirst(Instruction):
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def _impl(self, module, lane):
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assert lane.get_register(self._operands[1]) == 3
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if lane.is_first_active_lane():
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lane.broadcast_register(self._result, lane.get_register(self._operands[2]))
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class OpGroupNonUniformElect(Instruction):
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def _impl(self, module, lane):
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lane.set_register(self._result, lane.is_first_active_lane())
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