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bcad050106
This implements arm, armeb, thumb, thumbeb PLT entries parsing support in ELF for llvm-objdump. Implementation is similar to AArch64MCInstrAnalysis::findPltEntries. PLT entry signatures are based on LLD code for PLT generation (ARM::writePlt). llvm-objdump tests are produced from lld/test/ELF/arm-plt-reloc.s, lld/test/ELF/armv8-thumb-plt-reloc.s.
117 lines
5.1 KiB
ArmAsm
117 lines
5.1 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7a-none-linux-gnueabi %s -o %t
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// RUN: ld.lld %t --shared --icf=all -o %t.so
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// The output file is large, most of it zeroes. We dissassemble only the
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// parts we need to speed up the test and avoid a large output file
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// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x2000000 --stop-address=0x2000018 | FileCheck --check-prefix=CHECK1 %s
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// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x2800004 --stop-address=0x2800034 | FileCheck --check-prefix=CHECK2 %s
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// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x4000000 --stop-address=0x4000010 | FileCheck --check-prefix=CHECK3 %s
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// RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x4000010 --stop-address=0x4000100 --triple=armv7a-linux-gnueabihf | FileCheck --check-prefix=CHECK4 %s
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// RUN: rm %t.so
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.syntax unified
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.thumb
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// Make sure that we generate a range extension thunk to a PLT entry
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.section ".text.1", "ax", %progbits
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.global sym1
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.global elsewhere
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.type elsewhere, %function
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.global preemptible
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.type preemptible, %function
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.global far_preemptible
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.type far_preemptible, %function
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.global far_nonpreemptible
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.hidden far_nonpreemptible
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.type far_nonpreemptible, %function
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.global far_nonpreemptible_alias
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.hidden far_nonpreemptible_alias
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.type far_nonpreemptible_alias, %function
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sym1:
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bl elsewhere
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bl preemptible
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bx lr
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preemptible:
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bl far_preemptible
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bl far_nonpreemptible
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bl far_nonpreemptible_alias
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bx lr
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// CHECK1: Disassembly of section .text:
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// CHECK1-EMPTY:
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// CHECK1-NEXT: <sym1>:
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// CHECK1-NEXT: 2000000: f000 d800 bl 0x2800004 <__ThumbV7PILongThunk_elsewhere>
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// CHECK1-NEXT: 2000004: f000 d804 bl 0x2800010 <__ThumbV7PILongThunk_preemptible>
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// CHECK1-NEXT: 2000008: 4770 bx lr
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// CHECK1: <preemptible>:
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// CHECK1-NEXT: 200000a: f000 d807 bl 0x280001c <__ThumbV7PILongThunk_far_preemptible>
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// CHECK1-NEXT: 200000e: f000 d80b bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible>
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// CHECK1-NEXT: 2000012: f000 d809 bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible>
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// CHECK1-NEXT: 2000016: 4770 bx lr
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.section .text.2, "ax", %progbits
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.balign 0x0800000
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bx lr
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// CHECK2: <__ThumbV7PILongThunk_elsewhere>:
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// CHECK2-NEXT: 2800004: f240 0c20 movw r12, #32
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// CHECK2-NEXT: 2800008: f2c0 1c80 movt r12, #384
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// CHECK2-NEXT: 280000c: 44fc add r12, pc
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// CHECK2-NEXT: 280000e: 4760 bx r12
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// CHECK2: <__ThumbV7PILongThunk_preemptible>:
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// CHECK2-NEXT: 2800010: f240 0c24 movw r12, #36
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// CHECK2-NEXT: 2800014: f2c0 1c80 movt r12, #384
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// CHECK2-NEXT: 2800018: 44fc add r12, pc
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// CHECK2-NEXT: 280001a: 4760 bx r12
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// CHECK2: <__ThumbV7PILongThunk_far_preemptible>:
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// CHECK2-NEXT: 280001c: f240 0c28 movw r12, #40
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// CHECK2-NEXT: 2800020: f2c0 1c80 movt r12, #384
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// CHECK2-NEXT: 2800024: 44fc add r12, pc
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// CHECK2-NEXT: 2800026: 4760 bx r12
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// CHECK2: <__ThumbV7PILongThunk_far_nonpreemptible>:
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// CHECK2-NEXT: 2800028: f64f 7ccd movw r12, #65485
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// CHECK2-NEXT: 280002c: f2c0 1c7f movt r12, #383
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// CHECK2-NEXT: 2800030: 44fc add r12, pc
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// CHECK2-NEXT: 2800032: 4760 bx r12
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.section .text.3, "ax", %progbits
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.balign 0x2000000
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far_preemptible:
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far_nonpreemptible:
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bl elsewhere
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.section .text.4, "ax", %progbits
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.balign 0x2000000
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far_nonpreemptible_alias:
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bl elsewhere
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// CHECK3: <far_preemptible>:
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// CHECK3: 4000000: f000 e816 blx 0x4000030
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// CHECK4: Disassembly of section .plt:
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// CHECK4-EMPTY:
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// CHECK4-NEXT: <.plt>:
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// CHECK4-NEXT: 4000010: e52de004 str lr, [sp, #-4]!
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// CHECK4-NEXT: 4000014: e28fe600 add lr, pc, #0, #12
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// CHECK4-NEXT: 4000018: e28eea20 add lr, lr, #32
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// CHECK4-NEXT: 400001c: e5bef0a4 ldr pc, [lr, #164]!
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// CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK4-NEXT: 4000024: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK4-NEXT: 4000028: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK4-EMPTY:
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// CHECK4-NEXT: <elsewhere@plt>:
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// CHECK4-NEXT: 4000030: e28fc600 add r12, pc, #0, #12
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// CHECK4-NEXT: 4000034: e28cca20 add r12, r12, #32
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// CHECK4-NEXT: 4000038: e5bcf08c ldr pc, [r12, #140]!
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// CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK4-EMPTY:
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// CHECK4-NEXT: <preemptible@plt>:
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// CHECK4-NEXT: 4000040: e28fc600 add r12, pc, #0, #12
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// CHECK4-NEXT: 4000044: e28cca20 add r12, r12, #32
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// CHECK4-NEXT: 4000048: e5bcf080 ldr pc, [r12, #128]!
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// CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4
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// CHECK4-EMPTY:
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// CHECK4-NEXT: <far_preemptible@plt>:
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// CHECK4-NEXT: 4000050: e28fc600 add r12, pc, #0, #12
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// CHECK4-NEXT: 4000054: e28cca20 add r12, r12, #32
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// CHECK4-NEXT: 4000058: e5bcf074 ldr pc, [r12, #116]!
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// CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4
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