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llvm-project/llvm/test/CodeGen
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David Green 1610311a95 [AArch64] Fixes for BigEndian 128bit volatile, atomic and non-temporal loads/stores 
This fixes up the generation of 128bit atomic, volatile and non-temporal
loads/stores, under the assumption that they should usually be the same as
standard versions.
https://godbolt.org/z/xxc89eMKE

Fixes #64580
Closes #67413
2023-09-29 17:21:19 +01:00
..
AArch64
[AArch64] Fixes for BigEndian 128bit volatile, atomic and non-temporal loads/stores
2023-09-29 17:21:19 +01:00
AMDGPU
[ISel] Fix another crash in new FMA DAG combine (#67818)
2023-09-29 17:18:23 +01:00
ARC
…
ARM
Revert "[GlobalISel] LegalizationArtifactCombiner: Elide redundant G_AND"
2023-09-29 03:35:40 +02:00
AVR
[RA] Split a virtual register in cold blocks if it is not assigned preferred physical register
2023-09-15 19:52:50 +00:00
BPF
Revert "Reapply [Verifier] Sanity check alloca size against DILocalVariable fragment size"
2023-09-18 17:24:53 +02:00
CSKY
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DirectX
[SPIRV][DX] Share one test between backends (#65975)
2023-09-21 12:15:55 +02:00
Generic
[MLGO] Move MBB Profile Dump test to Generic (#66856)
2023-09-20 11:50:33 -07:00
Hexagon
[CodeGen] Renumber slot indexes before register allocation (#66334)
2023-09-19 11:18:12 +01:00
Inputs
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Lanai
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LoongArch
[LoongArch] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'
2023-09-26 11:46:07 +08:00
M68k
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Mips
Revert "[GlobalISel] LegalizationArtifactCombiner: Elide redundant G_AND"
2023-09-29 03:35:40 +02:00
MIR
[AArch64] Move PAuth codegen down the machine pipeline
2023-09-22 14:49:14 +03:00
MLRegAlloc
[MLGO] Move MBB Profile Dump test to Generic (#66856)
2023-09-20 11:50:33 -07:00
MSP430
…
NVPTX
Reland [NVPTX] Add support for maxclusterrank in launch_bounds (#66496) (#67667)
2023-09-29 08:39:31 +02:00
PowerPC
Disable call to fma for soft-float
2023-09-28 14:06:54 +05:30
RISCV
[RISCV] Add test coverage for sum reduction recognition in DAG
2023-09-29 07:54:55 -07:00
SPARC
[SPARC] Add a missing SPARC64-LABEL check
2023-09-28 13:15:09 +01:00
SPIRV
[SPIRV] Add OpAccessChain instruction support (#66253)
2023-09-26 16:33:17 +02:00
SystemZ
[DAGCombiner] Combine (select c, (and X, 1), 0) -> (and (zext c), X)
2023-09-28 13:46:46 -05:00
Thumb
…
Thumb2
[MachineLICM] Handle Subloops
2023-09-26 14:25:11 +01:00
VE
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WebAssembly
[MachineLICM] Handle Subloops
2023-09-26 14:25:11 +01:00
WinCFGuard
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WinEH
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X86
[X86] combine-subo.ll - add common CHECK prefix
2023-09-29 10:31:38 +01:00
XCore
…