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c65901282b
This patch teaches llvm-mca how to parse code comments in search for special "markers" used to select regions of code. Example: # LLVM-MCA-BEGIN My Code Region .... # LLVM-MCA-END The MCAsmLexer now delegates to an object of class MCACommentParser (i.e. an AsmCommentConsumer) the parsing of code comments to search for begin/end code region markers. A comment starting with substring "LLVM-MCA-BEGIN" marks the beginning of a new region of code. A comment starting with substring "LLVM-MCA-END" marks the end of the last region. This implementation doesn't allow regions to overlap. Each region can have a optional description; internally, each region is identified by a range of source code locations (SMLoc). MCInst objects are added to a region R only if the source location for the MCInst is in the range of locations specified by R. By default, the tool allocates an implicit "Default" code region which contains every source location. See new tests llvm-mca-marker-*.s for a few examples. A new Backend object is created for every region. So, the analysis is conducted on every parsed code region. The final report is the union of the reports generated for every code region. Note that empty regions are skipped. Special "[#] Code Region - ..." strings are used in the report to mark the portion which is specific to a code region only. For example, see llvm-mca-markers-5.s. Differential Revision: https://reviews.llvm.org/D45433 llvm-svn: 329590
166 lines
5.6 KiB
ReStructuredText
166 lines
5.6 KiB
ReStructuredText
llvm-mca - LLVM Machine Code Analyzer
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=====================================
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SYNOPSIS
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--------
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:program:`llvm-mca` [*options*] [input]
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DESCRIPTION
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-----------
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:program:`llvm-mca` is a performance analysis tool that uses information
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available in LLVM (e.g. scheduling models) to statically measure the performance
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of machine code in a specific CPU.
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Performance is measured in terms of throughput as well as processor resource
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consumption. The tool currently works for processors with an out-of-order
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backend, for which there is a scheduling model available in LLVM.
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The main goal of this tool is not just to predict the performance of the code
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when run on the target, but also help with diagnosing potential performance
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issues.
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Given an assembly code sequence, llvm-mca estimates the IPC (Instructions Per
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Cycle), as well as hardware resource pressure. The analysis and reporting style
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were inspired by the IACA tool from Intel.
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:program:`llvm-mca` allows the usage of special code comments to mark regions of
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the assembly code to be analyzed. A comment starting with substring
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``LLVM-MCA-BEGIN`` marks the beginning of a code region. A comment starting with
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substring ``LLVM-MCA-END`` marks the end of a code region. For example:
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.. code-block:: none
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# LLVM-MCA-BEGIN My Code Region
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...
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# LLVM-MCA-END
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Multiple regions can be specified provided that they do not overlap. A code
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region can have an optional description. If no user defined region is specified,
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then :program:`llvm-mca` assumes a default region which contains every
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instruction in the input file. Every region is analyzed in isolation, and the
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final performance report is the union of all the reports generated for every
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code region.
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OPTIONS
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-------
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If ``input`` is "``-``" or omitted, :program:`llvm-mca` reads from standard
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input. Otherwise, it will read from the specified filename.
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If the :option:`-o` option is omitted, then :program:`llvm-mca` will send its output
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to standard output if the input is from standard input. If the :option:`-o`
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option specifies "``-``", then the output will also be sent to standard output.
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.. option:: -help
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Print a summary of command line options.
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.. option:: -mtriple=<target triple>
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Specify a target triple string.
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.. option:: -march=<arch>
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Specify the architecture for which to analyze the code. It defaults to the
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host default target.
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.. option:: -mcpu=<cpuname>
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Specify the processor for whic to run the analysis.
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By default this defaults to a "generic" processor. It is not autodetected to
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the current architecture.
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.. option:: -output-asm-variant=<variant id>
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Specify the output assembly variant for the report generated by the tool.
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On x86, possible values are [0, 1]. A value of 0 (vic. 1) for this flag enables
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the AT&T (vic. Intel) assembly format for the code printed out by the tool in
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the analysis report.
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.. option:: -dispatch=<width>
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Specify a different dispatch width for the processor. The dispatch width
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defaults to field 'IssueWidth' in the processor scheduling model. If width is
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zero, then the default dispatch width is used.
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.. option:: -register-file-size=<size>
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Specify the size of the register file. When specified, this flag limits how
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many temporary registers are available for register renaming purposes. A value
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of zero for this flag means "unlimited number of temporary registers".
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.. option:: -iterations=<number of iterations>
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Specify the number of iterations to run. If this flag is set to 0, then the
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tool sets the number of iterations to a default value (i.e. 70).
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.. option:: -noalias=<bool>
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If set, the tool assumes that loads and stores don't alias. This is the
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default behavior.
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.. option:: -lqueue=<load queue size>
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Specify the size of the load queue in the load/store unit emulated by the tool.
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By default, the tool assumes an unbound number of entries in the load queue.
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A value of zero for this flag is ignored, and the default load queue size is
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used instead.
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.. option:: -squeue=<store queue size>
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Specify the size of the store queue in the load/store unit emulated by the
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tool. By default, the tool assumes an unbound number of entries in the store
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queue. A value of zero for this flag is ignored, and the default store queue
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size is used instead.
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.. option:: -verbose
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Enable verbose output. In particular, this flag enables a number of extra
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statistics and performance counters for the dispatch logic, the reorder
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buffer, the retire control unit and the register file.
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.. option:: -timeline
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Enable the timeline view.
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.. option:: -timeline-max-iterations=<iterations>
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Limit the number of iterations to print in the timeline view. By default, the
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timeline view prints information for up to 10 iterations.
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.. option:: -timeline-max-cycles=<cycles>
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Limit the number of cycles in the timeline view. By default, the number of
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cycles is set to 80.
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.. option:: -resource-pressure
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Enable the resource pressure view. This is enabled by default.
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.. option:: -register-file-stats
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Enable register file usage statistics.
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.. option:: -instruction-info
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Enable the instruction info view. This is enabled by default.
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.. option:: -instruction-tables
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Prints resource pressure information based on the static information
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available from the processor model. This differs from the resource pressure
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view because it doesn't require that the code is simulated. It instead prints
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the theoretical uniform distribution of resource pressure for every
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instruction in sequence.
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EXIT STATUS
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-----------
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:program:`llvm-mca` returns 0 on success. Otherwise, an error message is printed
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to standard error, and the tool returns 1.
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