Fangrui Song d20190e684 [test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64 ...

Similar to commit 806761a7629df268c8aed49657aeccffa6bca449 to avoid issues due
to object file format differences. These tests are currently benign.

2023-09-29 10:13:06 -07:00

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generic-vreg-undef-use.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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live-ins-01.mir

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live-ins-02.mir

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live-ins-03.mir

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register-killed-inside-loop.mir

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test_copy_mismatch_types.mir

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test_copy_physregs_x86.mir

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test_copy.mir

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test_g_add.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_addrspacecast.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_assert_align.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_assert_sext_register_bank_class.mir

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test_g_assert_sext.mir

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test_g_assert_zext_register_bank_class.mir

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test_g_assert_zext.mir

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test_g_bitcast.mir

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test_g_brindirect_is_indirect_branch.mir

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test_g_brjt_is_indirect_branch.mir

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test_g_brjt.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_build_vector_trunc.mir

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test_g_build_vector.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_bzero.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_concat_vectors.mir

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test_g_constant_pool.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_constant.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_dyn_stackalloc.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_extract.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_fcmp.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_fconstant.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_icmp.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_insert.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_intrinsic_w_side_effects.mir

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test_g_intrinsic.mir

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test_g_inttoptr.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_invoke_region_start.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_is_fpclass.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_jump_table.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_llround.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_load.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_lround.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_memcpy_inline.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_memcpy.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_memmove.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_memset.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_merge_values.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_phi.mir

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test_g_ptr_add.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_ptrmask.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_ptrtoint.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_rotr_rotl.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_select.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_sext_inreg.mir

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test_g_sextload.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_shift.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_shuffle_vector.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_store.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_trunc.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_ubfx_sbfx.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_unmerge_values.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_g_zextload.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_insert_subreg.mir

[test] Change llc -march=aarch64|arm64 to -mtriple=aarch64|arm64

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test_phis_precede_nonphis.mir

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test_vector_reductions.mir

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undef-should-only-be-set-on-subreg-defs.mir

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undef-virt-reg-entry-block.mir

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undef-virt-reg-nonentry-block.mir

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verifier-ec-subreg-liveness.mir

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verifier-generic-extend-truncate.mir

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verifier-generic-types-1.mir

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verifier-generic-types-2.mir

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verifier-implicit-virtreg-invalid-physreg-liveness.mir

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verifier-phi-fail0.mir

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verifier-phi.mir

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verifier-pseudo-terminators.mir

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verifier-statepoint.mir

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verify-inlineasmbr.mir

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verify-reg-sequence.mir

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verify-regbankselected-dbg-undef-use.mir

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verify-regbankselected.mir

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verify-regops.mir

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verify-selected-dbg-undef-use.mir

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verify-selected.mir

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