Brandon Wu 23c0850d2e
[RISCV][VCIX] Add vcix_state to GNU inline assembly register set (#106914)
https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/56
Resolved https://github.com/llvm/llvm-project/issues/106700.
This enables inline asm to have vcix_state to be a clobbered register
thus disable reordering between VCIX intrinsics and inline asm.
2024-09-30 23:52:35 -07:00
..
2024-07-25 00:13:00 -07:00