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e1f056f692
Even as the NPM has been in use by Polly for a while now, the majority of the tests continue using the LPM passes. This patch ports the tests to use the NPM passes (for example, by replacing a flag such as -polly-detect with -passes=polly-detect following the NPM syntax for specifying passes) with some exceptions for some missing features in the new passes. Relanding #90632.
96 lines
3.1 KiB
LLVM
96 lines
3.1 KiB
LLVM
; RUN: opt %loadNPMPolly -passes=polly-codegen -S < %s | FileCheck %s -check-prefix=SEQUENTIAL
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; RUN: opt %loadNPMPolly -passes=polly-codegen -polly-ast-detect-parallel -S < %s | FileCheck %s -check-prefix=PARALLEL
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; This is a trivially parallel loop. We just use it to ensure that we actually
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; emit the right information.
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;
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; for (i = 0; i < n; i++)
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; A[i] = 1;
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;
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@A = common global [1024 x i32] zeroinitializer
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define void @test-one(i64 %n) {
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start:
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fence seq_cst
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br label %loop.header
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loop.header:
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%i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ]
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%exitcond = icmp ne i64 %i, %n
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br i1 %exitcond, label %loop.body, label %ret
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loop.body:
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%scevgep = getelementptr [1024 x i32], ptr @A, i64 0, i64 %i
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store i32 1, ptr %scevgep
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br label %loop.backedge
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loop.backedge:
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%i.next = add nsw i64 %i, 1
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br label %loop.header
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ret:
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fence seq_cst
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ret void
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}
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; SEQUENTIAL-LABEL: @test-one
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; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access
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; SEQUENTIAL-NOT: !llvm.access.group
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; SEQUENTIAL-NOT: !llvm.loop
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; PARALLEL: @test-one
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; PARALLEL: store i32 1, ptr %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID3:[0-9]+]]
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; PARALLEL: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID4:[0-9]+]]
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; This loop has memory dependences that require at least a simple dependence
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; analysis to detect the parallelism.
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;
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; for (i = 0; i < n; i++)
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; A[2 * i] = A[2 * i + 1];
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;
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define void @test-two(i64 %n) {
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start:
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fence seq_cst
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br label %loop.header
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loop.header:
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%i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ]
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%exitcond = icmp ne i64 %i, %n
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br i1 %exitcond, label %loop.body, label %ret
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loop.body:
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%loadoffset1 = mul nsw i64 %i, 2
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%loadoffset2 = add nsw i64 %loadoffset1, 1
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%scevgepload = getelementptr [1024 x i32], ptr @A, i64 0, i64 %loadoffset2
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%val = load i32, ptr %scevgepload
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%storeoffset = mul i64 %i, 2
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%scevgepstore = getelementptr [1024 x i32], ptr @A, i64 0, i64 %storeoffset
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store i32 %val, ptr %scevgepstore
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br label %loop.backedge
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loop.backedge:
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%i.next = add nsw i64 %i, 1
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br label %loop.header
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ret:
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fence seq_cst
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ret void
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}
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; SEQUENTIAL-LABEL: @test-two
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; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access
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; SEQUENTIAL-NOT: !llvm.access.group
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; SEQUENTIAL-NOT: !llvm.loop
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; PARALLEL: @test-two
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; PARALLEL: %val_p_scalar_ = load i32, ptr %scevgep, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID8:[0-9]*]]
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; PARALLEL: store i32 %val_p_scalar_, ptr %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID8]]
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; PARALLEL: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID9:[0-9]*]]
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; PARALLEL: ![[LoopID4]] = distinct !{![[LoopID4]], ![[PARACC5:[0-9]+]]}
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; PARALLEL: ![[PARACC5]] = !{!"llvm.loop.parallel_accesses", ![[GROUPID3]]}
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; PARALLEL: ![[LoopID9]] = distinct !{![[LoopID9]], ![[PARACC10:[0-9]+]]}
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; PARALLEL: ![[PARACC10]] = !{!"llvm.loop.parallel_accesses", ![[GROUPID8]]}
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