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94 lines
4.4 KiB
C++
94 lines
4.4 KiB
C++
//===- MLRegAllocEvictAdvisor.cpp - ML eviction advisor -------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Function declarations of utilities related to feature extraction for unit
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// testing.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H
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#define LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H
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#include "llvm/Analysis/MLModelRunner.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/SlotIndexes.h"
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using namespace llvm;
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// LRStartEndInfo contains the start and end of a specific live range as
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// slot indices as well as storing the index of the physical register it
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// is assigned to (or 1 above the phys reg count if its the candidate).
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// Used when extracting per-instruction features in the context of a
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// specific eviction problem.
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struct LRStartEndInfo {
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SlotIndex Begin;
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SlotIndex End;
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size_t Pos = 0;
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};
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void extractInstructionFeatures(
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llvm::SmallVectorImpl<LRStartEndInfo> &LRPosInfo,
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MLModelRunner *RegallocRunner, function_ref<int(SlotIndex)> GetOpcode,
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function_ref<float(SlotIndex)> GetMBBFreq,
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function_ref<MachineBasicBlock *(SlotIndex)> GetMBBReference,
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const int InstructionsIndex, const int InstructionsMappingIndex,
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const int MBBFreqIndex, const int MBBMappingIndex,
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const SlotIndex LastIndex);
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void extractMBBFrequency(const SlotIndex CurrentIndex,
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const size_t CurrentInstructionIndex,
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std::map<MachineBasicBlock *, size_t> &VisitedMBBs,
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function_ref<float(SlotIndex)> GetMBBFreq,
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MachineBasicBlock *CurrentMBBReference,
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MLModelRunner *RegallocRunner, const int MBBFreqIndex,
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const int MBBMappingIndex);
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// This is the maximum number of interfererring ranges. That's the number of
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// distinct AllocationOrder values, which comes from MCRegisterClass::RegsSize.
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// For X86, that's 32.
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// TODO: find a way to get this, statically, in a programmatic way.
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static const int64_t MaxInterferences = 32;
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// Logically, we can think of the feature set given to the evaluator as a 2D
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// matrix. The rows are the features (see next). The columns correspond to the
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// interferences. We treat the candidate virt reg as an 'interference', too, as
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// its feature set is the same as that of the interferring ranges. So we'll have
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// MaxInterferences + 1 columns and by convention, we will use the last column
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// for the virt reg seeking allocation.
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static const int64_t CandidateVirtRegPos = MaxInterferences;
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static const int64_t NumberOfInterferences = CandidateVirtRegPos + 1;
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// The number of instructions that a specific live range might have is variable,
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// but we're passing in a single matrix of instructions and tensorflow saved
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// models only support a fixed input size, so we have to cap the number of
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// instructions that can be passed along. The specific value was derived from
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// experimentation such that the majority of eviction problems would be
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// completely covered.
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static const int ModelMaxSupportedInstructionCount = 300;
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// When extracting per-instruction features, the advisor will currently create
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// a vector of size ModelMaxSupportedInstructionCount to hold the opcodes of the
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// instructions relevant to the eviction problem, and a NumberOfInterferences *
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// ModelMaxSupportedInstructionCount matrix that maps LRs to the instructions
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// that they span.
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static const std::vector<int64_t> InstructionsShape{
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1, ModelMaxSupportedInstructionCount};
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static const std::vector<int64_t> InstructionsMappingShape{
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1, NumberOfInterferences, ModelMaxSupportedInstructionCount};
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// When extracting mappings between MBBs and individual instructions, we create
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// a vector of MBB frequencies, currently of size 100, which was a value
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// determined through experimentation to encompass the vast majority of eviction
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// problems. The actual mapping is the same shape as the instruction opcodes
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// vector.
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static const int64_t ModelMaxSupportedMBBCount = 100;
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static const std::vector<int64_t> MBBFrequencyShape{1,
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ModelMaxSupportedMBBCount};
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#endif // LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H
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