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e47d3a3088
This permits an AArch64AbsLongThunk to be used in an environment where unaligned accesses are disabled. The AArch64AbsLongThunk does a load of an 8-byte address. When unaligned accesses are disabled this address must be 8-byte aligned. The vast majority of AArch64 systems will have unaligned accesses enabled in userspace. However, after a reset, before the MMU has been enabled, all memory accesses are to "device" memory, which requires aligned accesses. In systems with multi-stage boot loaders a thunk may be required to a later stage before the MMU has been enabled. As we only want to increase the alignment when the ldr is used we delay the increase in thunk alignment until we know we are going to write an ldr. We also need to account for the ThunkSection alignment increase when this happens. In some of the test updates, particularly those with shared CHECK lines with position independent thunks it was easier to ensure that the thunks started at an 8-byte aligned address in all cases.
58 lines
1.9 KiB
ArmAsm
58 lines
1.9 KiB
ArmAsm
// REQUIRES: aarch64
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// RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
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// RUN: echo "SECTIONS { \
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// RUN: .text1 0x10000 : { *(.text.01) *(.text.02) *(.text.03) } \
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// RUN: .text2 0x10010000 : { *(.text.04) } } " > %t.script
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// RUN: ld.lld --script %t.script -fix-cortex-a53-843419 -verbose %t.o -o %t2 \
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// RUN: 2>&1 | FileCheck -check-prefix=CHECK-PRINT %s
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// RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn --triple=aarch64-linux-gnu -d %t2 | FileCheck %s
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/// %t2 is 128 Megabytes, so delete it early.
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// RUN: rm %t2
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/// Test cases for Cortex-A53 Erratum 843419 that involve interactions with
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/// range extension thunks. Both erratum fixes and range extension thunks need
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/// precise address information and after creation alter address information.
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.section .text.01, "ax", %progbits
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.balign 4096
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.globl _start
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.type _start, %function
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_start:
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bl far_away
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/// Thunk to far_away, size 16-bytes goes here.
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.section .text.02, "ax", %progbits
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.space 4096 - 32
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/// Erratum sequence will only line up at address 0 modulo 0xffc when
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/// Thunk is inserted.
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.section .text.03, "ax", %progbits
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.globl t3_ff8_ldr
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.type t3_ff8_ldr, %function
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t3_ff8_ldr:
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adrp x0, dat
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ldr x1, [x1, #0]
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ldr x0, [x0, :got_lo12:dat]
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ret
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// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 10FF8 in unpatched output.
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// CHECK: 0000000000010ff8 <t3_ff8_ldr>:
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// CHECK-NEXT: adrp x0, 0x10010000
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// CHECK-NEXT: ldr x1, [x1]
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// CHECK-NEXT: b 0x11008
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// CHECK-NEXT: ret
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// CHECK: 0000000000011008 <__CortexA53843419_11000>:
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// CHECK-NEXT: ldr x0, [x0, #8]
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// CHECK-NEXT: b 0x11004
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.section .text.04, "ax", %progbits
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.globl far_away
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.type far_away, function
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far_away:
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ret
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.section .data
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.globl dat
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dat: .quad 0
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