llvm-project/lld/test/ELF/aarch64-thunk-bti-multipass.s
Peter Smith e47d3a3088
[LLD][AArch64] Increase alignment of AArch64AbsLongThunk to 8 (#133738)
This permits an AArch64AbsLongThunk to be used in an environment where
unaligned accesses are disabled.

The AArch64AbsLongThunk does a load of an 8-byte address. When unaligned
accesses are disabled this address must be 8-byte aligned.

The vast majority of AArch64 systems will have unaligned accesses
enabled in userspace. However, after a reset, before the MMU has been
enabled, all memory accesses are to "device" memory, which requires
aligned accesses. In systems with multi-stage boot loaders a thunk may
be required to a later stage before the MMU has been enabled.

As we only want to increase the alignment when the ldr is used we delay
the increase in thunk alignment until we know we are going to write an
ldr. We also need to account for the ThunkSection alignment increase
when this happens.

In some of the test updates, particularly those with shared CHECK lines
with position independent thunks it was easier to ensure that the thunks
started at an 8-byte aligned address in all cases.
2025-04-01 09:49:27 +01:00

110 lines
3.2 KiB
ArmAsm

// REQUIRES: aarch64
// RUN: rm -rf %t && split-file %s %t && cd %t
// RUN: llvm-mc -filetype=obj -triple=aarch64 asm -o a.o
// RUN: ld.lld --script=lds a.o -o out
// RUN: llvm-objdump -d --no-show-raw-insn out | FileCheck %s
/// Test that a thunk that at creation time does not need to use a BTI
/// compatible landing pad, but due to other thunk insertion ends up
/// out of short-branch range so a BTI thunk is required after all.
//--- asm
.section ".note.gnu.property", "a"
.p2align 3
.long 4
.long 0x10
.long 0x5
.asciz "GNU"
/// Enable BTI.
.long 0xc0000000 // GNU_PROPERTY_AARCH64_FEATURE_1_AND.
.long 4
.long 1 // GNU_PROPERTY_AARCH64_FEATURE_1_BTI.
.long 0
.section .text.0, "ax", %progbits
.balign 0x1000
.global _start
.type _start, %function
_start:
/// Call that requires a thunk.
bl fn1
/// padding so that the thunk for fn1 is placed after this section is
/// sufficiently close to the target to be within short range, but only
/// just so that a small displacement will mean a long thunk is needed.
.space 0x1000
/// Thunk for call to fn1 will be placed here. Initially it is in short Thunk
/// range of fn1, but due to a thunk added after a later section it won't be
/// and will need a long branch thunk, which in turn needs a BTI landing pad.
// CHECK-LABEL: <_start>:
// CHECK-NEXT: 10001000: bl 0x10002008 <__AArch64AbsLongThunk_fn1>
// CHECK-LABEL: <__AArch64AbsLongThunk_fn1>:
// CHECK-NEXT: 10002008: ldr x16, 0x10002010 <__AArch64AbsLongThunk_fn1+0x8>
// CHECK-NEXT: br x16
// CHECK-NEXT: 00 30 00 18 .word 0x18003000
// CHECK-NEXT: 00 00 00 00 .word 0x00000000
.section .text.1, "ax", %progbits
.balign 0x1000
.global farcall
.type farcall, %function
farcall:
/// Call that requires a thunk.
bl far
/// Section is aligned to 0x1000 boundary with size multipe of 0x1000.
.space 0x1000 - (. - farcall)
/// Thunk for call to far will be placed here. This will force text.2
/// on to the next alignment boundary, moving it further away from the
/// thunk inserted in the .text_low output section.
// CHECK-LABEL: <farcall>:
// CHECK-NEXT: 18001000: bl 0x18002000 <__AArch64AbsLongThunk_far>
// CHECK-LABEL: <__AArch64AbsLongThunk_far>:
// CHECK-NEXT: 18002000: ldr x16, 0x18002008 <__AArch64AbsLongThunk_far+0x8>
// CHECK-NEXT: br x16
// CHECK-NEXT: 00 00 00 30 .word 0x30000000
// CHECK-NEXT: 00 00 00 00 .word 0x00000000
.section .text.2, "ax", %progbits
.balign 0x1000
.global fn1
.type fn1, %function
fn1:
ret
.section .text.far, "ax", %progbits
.type far, %function
.global far
far:
ret
// CHECK-LABEL: <__AArch64BTIThunk_fn1>:
// CHECK-NEXT: 18003000: bti c
// CHECK-NExT: b 0x18004000 <fn1>
// CHECK-LABEL: <fn1>:
// CHECK-NEXT: 18004000: ret
// CHECK-LABEL: <__AArch64BTIThunk_far>:
// CHECK-NEXT: 30000000: bti c
// CHECK-LABEL: <far>:
// CHECK-NEXT: 30000004: ret
//--- lds
PHDRS {
low PT_LOAD FLAGS(0x1 | 0x4);
mid PT_LOAD FLAGS(0x1 | 0x4);
high PT_LOAD FLAGS(0x1 | 0x4);
}
SECTIONS {
.rodata 0x10000000 : { *(.note.gnu.property) } :low
.text_low : { *(.text.0) } :low
.text 0x18001000 : { *(.text.1) } :mid
.text_aligned : { *(.text.2) } :mid
.text_high 0x30000000 : { *(.text.far) } :high
}