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e47d3a3088
This permits an AArch64AbsLongThunk to be used in an environment where unaligned accesses are disabled. The AArch64AbsLongThunk does a load of an 8-byte address. When unaligned accesses are disabled this address must be 8-byte aligned. The vast majority of AArch64 systems will have unaligned accesses enabled in userspace. However, after a reset, before the MMU has been enabled, all memory accesses are to "device" memory, which requires aligned accesses. In systems with multi-stage boot loaders a thunk may be required to a later stage before the MMU has been enabled. As we only want to increase the alignment when the ldr is used we delay the increase in thunk alignment until we know we are going to write an ldr. We also need to account for the ThunkSection alignment increase when this happens. In some of the test updates, particularly those with shared CHECK lines with position independent thunks it was easier to ensure that the thunks started at an 8-byte aligned address in all cases.
483 lines
17 KiB
ArmAsm
483 lines
17 KiB
ArmAsm
// REQUIRES: aarch64
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// RUN: rm -rf %t && split-file %s %t && cd %t
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// RUN: llvm-mc -filetype=obj -triple=aarch64 asm -o a.o
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// RUN: ld.lld --shared --script=lds a.o -o out.so --defsym absolute=0xf0000000
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// RUN: llvm-objdump -d --no-show-raw-insn out.so | FileCheck %s
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// RUN: llvm-objdump -d --no-show-raw-insn out.so | FileCheck %s --check-prefix=CHECK-PADS
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// RUN: llvm-mc -filetype=obj -triple=aarch64 shared -o shared.o
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// RUN: ld.lld --shared -o shared.so shared.o
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// RUN: ld.lld shared.so --script=lds a.o -o exe --defsym absolute=0xf0000000
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// RUN: llvm-objdump -d --no-show-raw-insn exe | FileCheck %s --check-prefix=CHECK-EXE
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// RUN: llvm-objdump -d --no-show-raw-insn exe | FileCheck %s --check-prefix=CHECK-PADS
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/// Test thunk generation when destination does not have a BTI compatible
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/// landing pad. Linker must generate landing pad sections for thunks that use
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/// indirect branches.
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//--- asm
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.section ".note.gnu.property", "a"
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.p2align 3
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.long 4
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.long 0x10
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.long 0x5
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.asciz "GNU"
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/// Enable BTI.
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.long 0xc0000000 // GNU_PROPERTY_AARCH64_FEATURE_1_AND.
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.long 4
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.long 1 // GNU_PROPERTY_AARCH64_FEATURE_1_BTI.
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.long 0
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/// Short thunks are direct branches so we don't need landing pads. Expect
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/// all thunks to branch directly to target.
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.section .text.0, "ax", %progbits
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.balign 0x1000
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.global _start
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.type _start, %function
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_start:
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bl bti_c_target
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bl bti_j_target
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bl bti_jc_target
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bl paciasp_target
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bl pacibsp_target
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bl .text.2 + 0x4 // fn2
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b .text.2 + 0x4 // fn2
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bl fn1
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b fn1
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bl fn3
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b fn3
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bl fn4
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b fn4
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bl via_plt
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/// We cannot add landing pads for absolute symbols.
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bl absolute
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/// padding so that we require thunks that can be placed after this section.
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/// The thunks are close enough to the target to be short.
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.balign 8
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.space 0x1000
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// CHECK-PADS-LABEL: <_start>:
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// CHECK-PADS-NEXT: 10001000: bl 0x10002040
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// CHECK-PADS-NEXT: bl 0x10002044
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// CHECK-PADS-NEXT: bl 0x10002048
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// CHECK-PADS-NEXT: bl 0x1000204c
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// CHECK-PADS-NEXT: bl 0x10002050
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// CHECK-PADS-NEXT: bl 0x10002054
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// CHECK-PADS-NEXT: b 0x10002054
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// CHECK-PADS-NEXT: bl 0x10002058
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// CHECK-PADS-NEXT: b 0x10002058
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// CHECK-PADS-NEXT: bl 0x1000205c
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// CHECK-PADS-NEXT: b 0x1000205c
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// CHECK-PADS-NEXT: bl 0x10002060
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// CHECK-PADS-NEXT: b 0x10002060
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// CHECK-PADS-NEXT: bl 0x10002064
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// CHECK-PADS-NEXT: bl 0x10002068
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 10002040: b 0x18001000 <bti_c_target>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 10002044: b 0x18001008 <bti_j_target>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 10002048: b 0x18001010 <bti_jc_target>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 1000204c: b 0x18001018 <paciasp_target>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 10002050: b 0x18001020 <pacibsp_target>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 10002054: b 0x18001038 <fn2>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 10002058: b 0x18001034 <fn1>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 1000205c: b 0x18001040 <fn3>
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 10002060: b 0x18001050 <fn4>
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// CHECK-LABEL: <__AArch64ADRPThunk_via_plt>:
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// CHECK-NEXT: 10002064: b 0x18001080 <via_plt@plt>
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// CHECK-LABEL: <__AArch64ADRPThunk_absolute>:
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// CHECK-NEXT: 10002068: b 0x18001098 <absolute@plt>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 10002040: b 0x18001000 <bti_c_target>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 10002044: b 0x18001008 <bti_j_target>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 10002048: b 0x18001010 <bti_jc_target>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 1000204c: b 0x18001018 <paciasp_target>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 10002050: b 0x18001020 <pacibsp_target>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 10002054: b 0x18001038 <fn2>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 10002058: b 0x18001034 <fn1>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 1000205c: b 0x18001040 <fn3>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 10002060: b 0x18001050 <fn4>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_via_plt>:
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// CHECK-EXE-NEXT: 10002064: b 0x18001080 <via_plt@plt>
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// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_absolute>:
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// CHECK-EXE-NEXT: 10002068: ldr x16, 0x10002070 <__AArch64AbsLongThunk_absolute+0x8>
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// CHECK-EXE-NEXT: br x16
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// CHECK-EXE-NEXT: 00 00 00 f0 .word 0xf0000000
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// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
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.section .text.1, "ax", %progbits
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/// These indirect branch targets already have a BTI compatible landing pad,
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/// no alternative entry point required.
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.hidden bti_c_target
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.type bti_c_target, %function
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bti_c_target:
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bti c
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ret
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.hidden bti_j_target
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.type bti_j_target, %function
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bti_j_target:
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bti j
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ret
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.hidden bti_jc_target
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.type bti_jc_target, %function
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bti_jc_target:
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bti jc
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ret
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.hidden paciasp_target
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.type paciasp_target, %function
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paciasp_target:
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paciasp
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ret
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.hidden pacibsp_target
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.type pacibsp_target, %function
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pacibsp_target:
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pacibsp
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ret
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// CHECk-PADS-LABEL: <bti_c_target>:
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// CHECK-PADS: 18001000: bti c
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// CHECK-PADS-NEXT: ret
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// CHECK-PADS-LABEL: <bti_j_target>:
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// CHECK-PADS-NEXT: 18001008: bti j
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// CHECK-PADS-NEXT: ret
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// CHECK-PADS-LABEL: <bti_jc_target>:
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// CHECK-PADS-NEXT: 18001010: bti jc
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// CHECK-PADS-NEXT: ret
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// CHECK-PADS-LABEL: <paciasp_target>:
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// CHECK-PADS-NEXT: 18001018: paciasp
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// CHECK-PADS-NEXT: ret
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// CHECK-PADS-LABEL: <pacibsp_target>:
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// CHECK-PADS-NEXT: 18001020: pacibsp
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// CHECK-PADS-NEXT: ret
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/// These functions do not have BTI compatible landing pads. Expect linker
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/// generated landing pads for indirect branch thunks.
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.section .text.2, "ax", %progbits
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.hidden fn1
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.type fn1, %function
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fn1:
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ret
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.hidden fn2
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.type fn2, %function
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fn2:
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ret
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// CHECK-PADS-LABEL: <__AArch64BTIThunk_>:
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// CHECK-PADS-NEXT: 18001028: bti c
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// CHECK-PADS-NEXT: b 0x18001038 <fn2>
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// CHECK-PADS-LABEL: <__AArch64BTIThunk_>:
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// CHECK-PADS-NEXT: 18001030: bti c
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// CHECK-PADS-LABEL: <fn1>:
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// CHECK-PADS-NEXT: 18001034: ret
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// CHECK-PADS-LABEL <fn2>:
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// CHECK-PADS: 18001038: ret
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/// Section with only one function at offset 0. Landing pad should be able to
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/// fall through.
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.section .text.3, "ax", %progbits
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.hidden fn3
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.type fn3, %function
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fn3:
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ret
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// CHECK-PADS-LABEL: <__AArch64BTIThunk_>:
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// CHECK-PADS-NEXT: 1800103c: bti c
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// CHECK-PADS-LABEL: <fn3>:
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// CHECK-PADS-NEXT: 18001040: ret
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/// Section with only one function at offset 0, also with a high alignment
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/// requirement. Check that we don't fall through into alignment padding.
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.section .text.4, "ax", %progbits
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.hidden fn4
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.type fn4, %function
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.balign 16
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fn4:
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ret
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// CHECK-PADS-LABEL: <__AArch64BTIThunk_>:
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// CHECK-PADS: 18001044: bti c
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// CHECK-PADS-NEXT: b 0x18001050 <fn4>
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// CHECK-PADS-NEXT: udf #0x0
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// CHECK-PADS-LABEL: <fn4>:
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// CHECK-PADS-NEXT: 18001050: ret
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.section .long_calls, "ax", %progbits
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.global long_calls
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.type long_calls, %function
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long_calls:
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/// Expect thunk to target as targets have BTI or implicit BTI.
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bl bti_c_target
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bl bti_j_target
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bl bti_jc_target
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bl paciasp_target
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bl pacibsp_target
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/// Expect thunk to target a linker generated entry point with BTI landing pad.
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/// Two calls to make sure only one landing pad is created.
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bl .text.2 + 0x4 // fn2
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b .text.2 + 0x4 // fn2
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/// fn2 before fn1 so that landing pad for fn1 can fall through.
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bl fn1
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b fn1
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bl fn3
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b fn3
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bl fn4
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b fn4
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/// PLT entries reachable via Thunks have a BTI c at the start of each entry
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/// so no additional landing pad required.
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bl via_plt
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/// We cannot add landing pads for absolute symbols.
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bl absolute
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.balign 8
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/// PLT entries have BTI at start.
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// CHECK-LABEL: <via_plt@plt>:
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// CHECK-NEXT: bti c
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// CHECK-NEXT: adrp x16, 0x30000000
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// CHECK-NEXT: ldr x17, [x16, #0x1a0]
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// CHECK-NEXT: add x16, x16, #0x1a0
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// CHECK-NEXT: br x17
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// CHECK-NEXT: nop
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// CHECK: <absolute@plt>:
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// CHECK-NEXT: bti c
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// CHECK-NEXT: adrp x16, 0x30000000
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// CHECK-NEXT: ldr x17, [x16, #0x1a8]
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// CHECK-NEXT: add x16, x16, #0x1a8
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// CHECK-NEXT: br x17
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// CHECK-NEXT: nop
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// CHECK-EXE-LABEL: <via_plt@plt>:
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// CHECK-EXE-NEXT: 18001080: bti c
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// CHECK-EXE-NEXT: adrp x16, 0x30000000
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// CHECK-EXE-NEXT: ldr x17, [x16, #0x1e8]
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// CHECK-EXE-NEXT: add x16, x16, #0x1e8
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// CHECK-EXE-NEXT: br x17
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// CHECK-EXE-NEXT: nop
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// CHECK-LABEL: <long_calls>:
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// CHECK-NEXT: 30000000: bl 0x30000040 <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x3000004c <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x30000058 <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x30000064 <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x30000070 <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x3000007c <__AArch64ADRPThunk_>
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// CHECK-NEXT: b 0x3000007c <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x30000088 <__AArch64ADRPThunk_>
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// CHECK-NEXT: b 0x30000088 <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x30000094 <__AArch64ADRPThunk_>
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// CHECK-NEXT: b 0x30000094 <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x300000a0 <__AArch64ADRPThunk_>
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// CHECK-NEXT: b 0x300000a0 <__AArch64ADRPThunk_>
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// CHECK-NEXT: bl 0x300000ac <__AArch64ADRPThunk_via_plt>
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// CHECK-NEXT: bl 0x300000b8 <__AArch64ADRPThunk_absolute>
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/// bti_c_target.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 30000040: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x0
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// CHECK-NEXT: br x16
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/// bti_j_target.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x8
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// CHECK-NEXT: br x16
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/// bti_jc_target.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x10
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// CHECK-NEXT: br x16
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/// paciasp_target.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x18
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// CHECK-NEXT: br x16
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/// pacibsp_target.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x20
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// CHECK-NEXT: br x16
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/// Landing pad for fn2.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x28
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// CHECK-NEXT: br x16
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/// Landing pad for fn1.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x30
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// CHECK-NEXT: br x16
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/// Landing pad for fn3.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x3c
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// CHECK-NEXT: br x16
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/// Landing pad for fn4.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x44
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// CHECK-NEXT: br x16
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// CHECK-LABEL: <__AArch64ADRPThunk_via_plt>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x80
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// CHECK-NEXT: br x16
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// CHECK-LABEL: <__AArch64ADRPThunk_absolute>:
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// CHECK-NEXT: adrp x16, 0x18001000 <bti_c_target>
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// CHECK-NEXT: add x16, x16, #0x98
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// CHECK-NEXT: br x16
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// CHECK-EXE-LABEL: <long_calls>:
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// CHECK-EXE-NEXT: 30000000: bl 0x30000040 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x30000050 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x30000060 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x30000070 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x30000080 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x30000090 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: b 0x30000090 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x300000a0 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: b 0x300000a0 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x300000b0 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: b 0x300000b0 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x300000c0 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: b 0x300000c0 <__AArch64AbsLongThunk_>
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// CHECK-EXE-NEXT: bl 0x300000d0 <__AArch64AbsLongThunk_via_plt>
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// CHECK-EXE-NEXT: bl 0x300000e0 <__AArch64AbsLongThunk_absolute>
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// CHECK-EXE-LABEL: 0000000030000040 <__AArch64AbsLongThunk_>:
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// CHECK-EXE-NEXT: 30000040: ldr x16, 0x30000048 <__AArch64AbsLongThunk_+0x8>
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// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 00 10 00 18 .word 0x18001000
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 30000050: ldr x16, 0x30000058 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 08 10 00 18 .word 0x18001008
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 30000060: ldr x16, 0x30000068 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 10 10 00 18 .word 0x18001010
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 30000070: ldr x16, 0x30000078 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 18 10 00 18 .word 0x18001018
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 30000080: ldr x16, 0x30000088 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 20 10 00 18 .word 0x18001020
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 30000090: ldr x16, 0x30000098 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 28 10 00 18 .word 0x18001028
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 300000a0: ldr x16, 0x300000a8 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 30 10 00 18 .word 0x18001030
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 300000b0: ldr x16, 0x300000b8 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 3c 10 00 18 .word 0x1800103c
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_>:
|
|
// CHECK-EXE-NEXT: 300000c0: ldr x16, 0x300000c8 <__AArch64AbsLongThunk_+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 44 10 00 18 .word 0x18001044
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_via_plt>:
|
|
// CHECK-EXE-NEXT: 300000d0: ldr x16, 0x300000d8 <__AArch64AbsLongThunk_via_plt+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 80 10 00 18 .word 0x18001080
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
// CHECK-EXE-LABEL: <__AArch64AbsLongThunk_absolute>:
|
|
// CHECK-EXE-NEXT: 300000e0: ldr x16, 0x300000e8 <__AArch64AbsLongThunk_absolute+0x8>
|
|
// CHECK-EXE-NEXT: br x16
|
|
// CHECK-EXE-NEXT: 00 00 00 f0 .word 0xf0000000
|
|
// CHECK-EXE-NEXT: 00 00 00 00 .word 0x00000000
|
|
|
|
//--- lds
|
|
PHDRS {
|
|
low PT_LOAD FLAGS(0x1 | 0x4);
|
|
mid PT_LOAD FLAGS(0x1 | 0x4);
|
|
high PT_LOAD FLAGS(0x1 | 0x4);
|
|
}
|
|
SECTIONS {
|
|
.rodata 0x10000000 : { *(.note.gnu.property) } :low
|
|
.text_low : { *(.text.0) } :low
|
|
.text 0x18001000 : { *(.text.*) } :mid
|
|
.plt : { *(.plt) } :mid
|
|
.text_high 0x30000000 : { *(.long_calls) } :high
|
|
}
|
|
|
|
//--- shared
|
|
.text
|
|
.global via_plt
|
|
.type via_plt, %function
|
|
via_plt:
|
|
ret
|