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[AArch64] Implement intrinsics for F1CVTL/F2CVTL and BF1CVTL/BF2CVTL (#116959 )

This patch implements the following intrinsics:

8-bit floating-point convert to deinterleaved half-precision or
BFloat16.
``` c
  // Variant is also available for: _bf16[_mf8]_x2
  svfloat16x2_t svcvtl1_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
  svfloat16x2_t svcvtl2_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
```

Defined in https://github.com/ARM-software/acle/pull/323

Co-authored-by: Caroline Concatto caroline.concatto@arm.com
Co-authored-by: Marian Lukac marian.lukac@arm.com

2024-11-28 12:37:02 +00:00

ABITest

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analyzer

[analyzer] Print the PostInitializer target in exploded-graph-rewriter (#116034 )

2024-11-22 16:40:13 +01:00

check_cfc

[clang] Fix python comparison to None (#94014 )

2024-09-19 16:33:12 +02:00

CIndex

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ClangVisualizers