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https://reviews.llvm.org/D41373 The various components are GICombinerHelper contains transformations that are common to all targets. Targets can pick and choose which transformations (at function/opcode granularity) each pass uses via configuring a GICombinerInfo. GICombiner contains some common code and it does the traversal, driving of combines, worklist management and iterating until convergence. GICombinerInfo is an interface with a virtual method called combine. The combiner info will allow targets to pick and choose (or implement their own specific combines). CombineInfos can make use of available combines in GICombineHelper to configure the transformations for a particular pass. Currently this approach allows cherry picking transformations from helpers (at function/opcode granularity) and also allows early returning on specific transformations. Targets also get to prioritize whether target specific combines run before/after the opt-in generic combines. Ideally we would like this part to be configured by both C++ and Tablegen. The CombinerInfo also has a field which indicates how to deal with IllegalOps (ie - should we allow to create them/or legalize them?). A CombinerPass would configure a CombinerInfo, create the GICombiner with the Info, and call GICombiner::combineMachineInstrs(MachineFunction&). This organization is very similar to the GISelLegalizer. llvm-svn: 323392
42 lines
1.3 KiB
C++
42 lines
1.3 KiB
C++
//== ---lib/CodeGen/GlobalISel/GICombinerHelper.cpp --------------------- == //
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/GlobalISel/Utils.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#define DEBUG_TYPE "gi-combine"
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using namespace llvm;
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CombinerHelper::CombinerHelper(MachineIRBuilder &B) :
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Builder(B), MRI(Builder.getMF().getRegInfo()) {}
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bool CombinerHelper::tryCombineCopy(MachineInstr &MI) {
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if (MI.getOpcode() != TargetOpcode::COPY)
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return false;
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unsigned DstReg = MI.getOperand(0).getReg();
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unsigned SrcReg = MI.getOperand(1).getReg();
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LLT DstTy = MRI.getType(DstReg);
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LLT SrcTy = MRI.getType(SrcReg);
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// Simple Copy Propagation.
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// a(sx) = COPY b(sx) -> Replace all uses of a with b.
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if (DstTy.isValid() && SrcTy.isValid() && DstTy == SrcTy) {
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MI.eraseFromParent();
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MRI.replaceRegWith(DstReg, SrcReg);
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return true;
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}
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return false;
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}
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bool CombinerHelper::tryCombine(MachineInstr &MI) {
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return tryCombineCopy(MI);
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}
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