mirror of
https://github.com/llvm/llvm-project.git
synced 2025-05-02 17:26:06 +00:00
4658366d95
Part of patchset to add initial support for ARM64EC. I'm not completely sure I understand the reason for this restriction, but Microsoft documentation says that asynchronous signals clobber these registers, so we can't ever use them. As far as I know, none of these registers have any hardcoded meaning, so reserving them shouldn't have any significant side-effects. Differental Revision: https://reviews.llvm.org/D125413